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Eugen Hristev32f36cf2023-02-22 11:05:12 +02001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
Eugen Hristev72d61d12023-05-29 10:34:23 +03005#include <dt-bindings/gpio/gpio.h>
Jonas Karlmanf62397a2023-10-17 17:02:08 +00006#include <dt-bindings/leds/common.h>
Eugen Hristev32f36cf2023-02-22 11:05:12 +02007#include "rk3588.dtsi"
8
9/ {
10 model = "Radxa ROCK 5 Model B";
11 compatible = "radxa,rock-5b", "rockchip,rk3588";
12
13 aliases {
14 mmc0 = &sdhci;
FUKAUMI Naoki61315172023-09-05 20:47:35 +090015 mmc1 = &sdmmc;
Jonas Karlmanf62397a2023-10-17 17:02:08 +000016 mmc2 = &sdio;
Eugen Hristev32f36cf2023-02-22 11:05:12 +020017 serial2 = &uart2;
18 };
19
20 chosen {
21 stdout-path = "serial2:1500000n8";
22 };
23
FUKAUMI Naoki61315172023-09-05 20:47:35 +090024 analog-sound {
Eugen Hristev72d61d12023-05-29 10:34:23 +030025 compatible = "audio-graph-card";
FUKAUMI Naoki61315172023-09-05 20:47:35 +090026 label = "rk3588-es8316";
Eugen Hristev72d61d12023-05-29 10:34:23 +030027
28 widgets = "Microphone", "Mic Jack",
29 "Headphone", "Headphones";
30
31 routing = "MIC2", "Mic Jack",
32 "Headphones", "HPOL",
33 "Headphones", "HPOR";
34
35 dais = <&i2s0_8ch_p0>;
36 hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
37 pinctrl-names = "default";
38 pinctrl-0 = <&hp_detect>;
39 };
40
Jonas Karlmanf62397a2023-10-17 17:02:08 +000041 leds {
42 compatible = "gpio-leds";
43 pinctrl-names = "default";
44 pinctrl-0 = <&led_rgb_b>;
45
46 led_rgb_b {
47 function = LED_FUNCTION_STATUS;
48 color = <LED_COLOR_ID_BLUE>;
49 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
50 linux,default-trigger = "heartbeat";
51 };
52 };
53
FUKAUMI Naoki61315172023-09-05 20:47:35 +090054 fan: pwm-fan {
55 compatible = "pwm-fan";
56 cooling-levels = <0 95 145 195 255>;
57 fan-supply = <&vcc5v0_sys>;
58 pwms = <&pwm1 0 50000 0>;
59 #cooling-cells = <2>;
60 };
61
Jonas Karlmanf62397a2023-10-17 17:02:08 +000062 vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
63 compatible = "regulator-fixed";
64 enable-active-high;
65 gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&pcie2_0_vcc3v3_en>;
68 regulator-name = "vcc3v3_pcie2x1l0";
69 regulator-always-on;
70 regulator-boot-on;
71 regulator-min-microvolt = <3300000>;
72 regulator-max-microvolt = <3300000>;
73 startup-delay-us = <50000>;
74 vin-supply = <&vcc5v0_sys>;
75 };
76
77 vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
78 compatible = "regulator-fixed";
79 regulator-name = "vcc3v3_pcie2x1l2";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 startup-delay-us = <5000>;
83 vin-supply = <&vcc_3v3_s3>;
84 };
85
86 vcc3v3_pcie30: vcc3v3-pcie30-regulator {
87 compatible = "regulator-fixed";
88 enable-active-high;
89 gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
90 pinctrl-names = "default";
91 pinctrl-0 = <&pcie3_vcc3v3_en>;
92 regulator-name = "vcc3v3_pcie30";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 startup-delay-us = <5000>;
96 vin-supply = <&vcc5v0_sys>;
97 };
98
FUKAUMI Naoki61315172023-09-05 20:47:35 +090099 vcc5v0_host: vcc5v0-host-regulator {
100 compatible = "regulator-fixed";
101 regulator-name = "vcc5v0_host";
102 regulator-boot-on;
103 regulator-always-on;
104 regulator-min-microvolt = <5000000>;
105 regulator-max-microvolt = <5000000>;
106 enable-active-high;
107 gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
108 pinctrl-names = "default";
109 pinctrl-0 = <&vcc5v0_host_en>;
110 vin-supply = <&vcc5v0_sys>;
111 };
112
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200113 vcc5v0_sys: vcc5v0-sys-regulator {
114 compatible = "regulator-fixed";
115 regulator-name = "vcc5v0_sys";
116 regulator-always-on;
117 regulator-boot-on;
118 regulator-min-microvolt = <5000000>;
119 regulator-max-microvolt = <5000000>;
120 };
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900121
122 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
123 compatible = "regulator-fixed";
124 regulator-name = "vcc_1v1_nldo_s3";
125 regulator-always-on;
126 regulator-boot-on;
127 regulator-min-microvolt = <1100000>;
128 regulator-max-microvolt = <1100000>;
129 vin-supply = <&vcc5v0_sys>;
130 };
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200131};
132
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000133&combphy0_ps {
134 status = "okay";
135};
136
137&combphy1_ps {
138 status = "okay";
139};
140
Eugen Hristev72d61d12023-05-29 10:34:23 +0300141&cpu_b0 {
142 cpu-supply = <&vdd_cpu_big0_s0>;
143};
144
145&cpu_b1 {
146 cpu-supply = <&vdd_cpu_big0_s0>;
147};
148
149&cpu_b2 {
150 cpu-supply = <&vdd_cpu_big1_s0>;
151};
152
153&cpu_b3 {
154 cpu-supply = <&vdd_cpu_big1_s0>;
155};
156
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900157&cpu_l0 {
158 cpu-supply = <&vdd_cpu_lit_s0>;
159};
160
161&cpu_l1 {
162 cpu-supply = <&vdd_cpu_lit_s0>;
163};
164
165&cpu_l2 {
166 cpu-supply = <&vdd_cpu_lit_s0>;
167};
168
169&cpu_l3 {
170 cpu-supply = <&vdd_cpu_lit_s0>;
171};
172
Eugen Hristev72d61d12023-05-29 10:34:23 +0300173&i2c0 {
174 pinctrl-names = "default";
175 pinctrl-0 = <&i2c0m2_xfer>;
176 status = "okay";
177
178 vdd_cpu_big0_s0: regulator@42 {
179 compatible = "rockchip,rk8602";
180 reg = <0x42>;
181 fcs,suspend-voltage-selector = <1>;
182 regulator-name = "vdd_cpu_big0_s0";
183 regulator-always-on;
184 regulator-boot-on;
185 regulator-min-microvolt = <550000>;
186 regulator-max-microvolt = <1050000>;
187 regulator-ramp-delay = <2300>;
188 vin-supply = <&vcc5v0_sys>;
189
190 regulator-state-mem {
191 regulator-off-in-suspend;
192 };
193 };
194
195 vdd_cpu_big1_s0: regulator@43 {
196 compatible = "rockchip,rk8603", "rockchip,rk8602";
197 reg = <0x43>;
198 fcs,suspend-voltage-selector = <1>;
199 regulator-name = "vdd_cpu_big1_s0";
200 regulator-always-on;
201 regulator-boot-on;
202 regulator-min-microvolt = <550000>;
203 regulator-max-microvolt = <1050000>;
204 regulator-ramp-delay = <2300>;
205 vin-supply = <&vcc5v0_sys>;
206
207 regulator-state-mem {
208 regulator-off-in-suspend;
209 };
210 };
211};
212
213&i2c6 {
214 status = "okay";
215
216 hym8563: rtc@51 {
217 compatible = "haoyu,hym8563";
218 reg = <0x51>;
219 #clock-cells = <0>;
220 clock-output-names = "hym8563";
221 pinctrl-names = "default";
222 pinctrl-0 = <&hym8563_int>;
223 interrupt-parent = <&gpio0>;
224 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
225 wakeup-source;
226 };
227};
228
229&i2c7 {
230 status = "okay";
231
232 es8316: audio-codec@11 {
233 compatible = "everest,es8316";
234 reg = <0x11>;
235 clocks = <&cru I2S0_8CH_MCLKOUT>;
236 clock-names = "mclk";
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900237 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
238 assigned-clock-rates = <12288000>;
Eugen Hristev72d61d12023-05-29 10:34:23 +0300239 #sound-dai-cells = <0>;
240
241 port {
242 es8316_p0_0: endpoint {
243 remote-endpoint = <&i2s0_8ch_p0_0>;
244 };
245 };
246 };
247};
248
249&i2s0_8ch {
250 pinctrl-names = "default";
251 pinctrl-0 = <&i2s0_lrck
252 &i2s0_mclk
253 &i2s0_sclk
254 &i2s0_sdi0
255 &i2s0_sdo0>;
256 status = "okay";
257
258 i2s0_8ch_p0: port {
259 i2s0_8ch_p0_0: endpoint {
260 dai-format = "i2s";
261 mclk-fs = <256>;
262 remote-endpoint = <&es8316_p0_0>;
263 };
264 };
265};
266
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000267&pcie2x1l0 {
268 pinctrl-names = "default";
269 pinctrl-0 = <&pcie2_0_rst>;
270 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
271 vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
272 status = "okay";
273};
274
275&pcie2x1l2 {
276 pinctrl-names = "default";
277 pinctrl-0 = <&pcie2_2_rst>;
278 reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
279 vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
280 status = "okay";
281};
282
283&pcie30phy {
284 status = "okay";
285};
286
287&pcie3x4 {
288 pinctrl-names = "default";
289 pinctrl-0 = <&pcie3_rst>;
290 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
291 vpcie3v3-supply = <&vcc3v3_pcie30>;
292 status = "okay";
293};
294
Eugen Hristev72d61d12023-05-29 10:34:23 +0300295&pinctrl {
296 hym8563 {
297 hym8563_int: hym8563-int {
298 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
299 };
300 };
301
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000302 leds {
303 led_rgb_b: led-rgb-b {
304 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
305 };
306 };
307
Eugen Hristev72d61d12023-05-29 10:34:23 +0300308 sound {
309 hp_detect: hp-detect {
310 rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
311 };
312 };
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900313
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000314 pcie2 {
315 pcie2_0_rst: pcie2-0-rst {
316 rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
317 };
318
319 pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
320 rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
321 };
322
323 pcie2_2_rst: pcie2-2-rst {
324 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
325 };
326 };
327
328 pcie3 {
329 pcie3_rst: pcie3-rst {
330 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
331 };
332
333 pcie3_vcc3v3_en: pcie3-vcc3v3-en {
334 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
335 };
336 };
337
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900338 usb {
339 vcc5v0_host_en: vcc5v0-host-en {
340 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
341 };
342 };
Eugen Hristev72d61d12023-05-29 10:34:23 +0300343};
344
345&pwm1 {
346 status = "okay";
347};
348
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900349&saradc {
350 vref-supply = <&avcc_1v8_s0>;
351 status = "okay";
352};
353
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200354&sdhci {
355 bus-width = <8>;
356 no-sdio;
357 no-sd;
358 non-removable;
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200359 mmc-hs400-1_8v;
360 mmc-hs400-enhanced-strobe;
361 status = "okay";
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900362};
363
364&sdmmc {
365 max-frequency = <200000000>;
366 no-sdio;
367 no-mmc;
368 bus-width = <4>;
369 cap-mmc-highspeed;
370 cap-sd-highspeed;
371 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
372 disable-wp;
373 sd-uhs-sdr104;
374 vmmc-supply = <&vcc_3v3_s3>;
375 vqmmc-supply = <&vccio_sd_s0>;
376 status = "okay";
377};
378
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000379&sdio {
380 max-frequency = <200000000>;
381 no-sd;
382 no-mmc;
383 non-removable;
384 bus-width = <4>;
385 cap-sdio-irq;
386 disable-wp;
387 keep-power-in-suspend;
388 wakeup-source;
389 sd-uhs-sdr12;
390 sd-uhs-sdr25;
391 sd-uhs-sdr50;
392 sd-uhs-sdr104;
393 vmmc-supply = <&vcc3v3_pcie2x1l0>;
394 vqmmc-supply = <&vcc_1v8_s3>;
395 pinctrl-names = "default";
396 pinctrl-0 = <&sdiom0_pins>;
397 status = "okay";
398};
399
400&uart6 {
401 pinctrl-names = "default";
402 pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>;
403 status = "okay";
404};
405
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900406&spi2 {
407 status = "okay";
408 assigned-clocks = <&cru CLK_SPI2>;
409 assigned-clock-rates = <200000000>;
410 pinctrl-names = "default";
411 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
412 num-cs = <1>;
413
414 pmic@0 {
415 compatible = "rockchip,rk806";
416 spi-max-frequency = <1000000>;
417 reg = <0x0>;
418
419 interrupt-parent = <&gpio0>;
420 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
421
422 pinctrl-names = "default";
423 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
424 <&rk806_dvs2_null>, <&rk806_dvs3_null>;
425
426 vcc1-supply = <&vcc5v0_sys>;
427 vcc2-supply = <&vcc5v0_sys>;
428 vcc3-supply = <&vcc5v0_sys>;
429 vcc4-supply = <&vcc5v0_sys>;
430 vcc5-supply = <&vcc5v0_sys>;
431 vcc6-supply = <&vcc5v0_sys>;
432 vcc7-supply = <&vcc5v0_sys>;
433 vcc8-supply = <&vcc5v0_sys>;
434 vcc9-supply = <&vcc5v0_sys>;
435 vcc10-supply = <&vcc5v0_sys>;
436 vcc11-supply = <&vcc_2v0_pldo_s3>;
437 vcc12-supply = <&vcc5v0_sys>;
438 vcc13-supply = <&vcc_1v1_nldo_s3>;
439 vcc14-supply = <&vcc_1v1_nldo_s3>;
440 vcca-supply = <&vcc5v0_sys>;
441
442 gpio-controller;
443 #gpio-cells = <2>;
444
445 rk806_dvs1_null: dvs1-null-pins {
446 pins = "gpio_pwrctrl2";
447 function = "pin_fun0";
448 };
449
450 rk806_dvs2_null: dvs2-null-pins {
451 pins = "gpio_pwrctrl2";
452 function = "pin_fun0";
453 };
454
455 rk806_dvs3_null: dvs3-null-pins {
456 pins = "gpio_pwrctrl3";
457 function = "pin_fun0";
458 };
459
460 regulators {
461 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
462 regulator-boot-on;
463 regulator-min-microvolt = <550000>;
464 regulator-max-microvolt = <950000>;
465 regulator-ramp-delay = <12500>;
466 regulator-name = "vdd_gpu_s0";
467 regulator-enable-ramp-delay = <400>;
468
469 regulator-state-mem {
470 regulator-off-in-suspend;
471 };
472 };
473
474 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
475 regulator-always-on;
476 regulator-boot-on;
477 regulator-min-microvolt = <550000>;
478 regulator-max-microvolt = <950000>;
479 regulator-ramp-delay = <12500>;
480 regulator-name = "vdd_cpu_lit_s0";
481
482 regulator-state-mem {
483 regulator-off-in-suspend;
484 };
485 };
486
487 vdd_log_s0: dcdc-reg3 {
488 regulator-always-on;
489 regulator-boot-on;
490 regulator-min-microvolt = <675000>;
491 regulator-max-microvolt = <750000>;
492 regulator-ramp-delay = <12500>;
493 regulator-name = "vdd_log_s0";
494
495 regulator-state-mem {
496 regulator-off-in-suspend;
497 regulator-suspend-microvolt = <750000>;
498 };
499 };
500
501 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
502 regulator-always-on;
503 regulator-boot-on;
504 regulator-min-microvolt = <550000>;
505 regulator-max-microvolt = <950000>;
506 regulator-ramp-delay = <12500>;
507 regulator-name = "vdd_vdenc_s0";
508
509 regulator-state-mem {
510 regulator-off-in-suspend;
511 };
512 };
513
514 vdd_ddr_s0: dcdc-reg5 {
515 regulator-always-on;
516 regulator-boot-on;
517 regulator-min-microvolt = <675000>;
518 regulator-max-microvolt = <900000>;
519 regulator-ramp-delay = <12500>;
520 regulator-name = "vdd_ddr_s0";
521
522 regulator-state-mem {
523 regulator-off-in-suspend;
524 regulator-suspend-microvolt = <850000>;
525 };
526 };
527
528 vdd2_ddr_s3: dcdc-reg6 {
529 regulator-always-on;
530 regulator-boot-on;
531 regulator-name = "vdd2_ddr_s3";
532
533 regulator-state-mem {
534 regulator-on-in-suspend;
535 };
536 };
537
538 vcc_2v0_pldo_s3: dcdc-reg7 {
539 regulator-always-on;
540 regulator-boot-on;
541 regulator-min-microvolt = <2000000>;
542 regulator-max-microvolt = <2000000>;
543 regulator-ramp-delay = <12500>;
544 regulator-name = "vdd_2v0_pldo_s3";
545
546 regulator-state-mem {
547 regulator-on-in-suspend;
548 regulator-suspend-microvolt = <2000000>;
549 };
550 };
551
552 vcc_3v3_s3: dcdc-reg8 {
553 regulator-always-on;
554 regulator-boot-on;
555 regulator-min-microvolt = <3300000>;
556 regulator-max-microvolt = <3300000>;
557 regulator-name = "vcc_3v3_s3";
558
559 regulator-state-mem {
560 regulator-on-in-suspend;
561 regulator-suspend-microvolt = <3300000>;
562 };
563 };
564
565 vddq_ddr_s0: dcdc-reg9 {
566 regulator-always-on;
567 regulator-boot-on;
568 regulator-name = "vddq_ddr_s0";
569
570 regulator-state-mem {
571 regulator-off-in-suspend;
572 };
573 };
574
575 vcc_1v8_s3: dcdc-reg10 {
576 regulator-always-on;
577 regulator-boot-on;
578 regulator-min-microvolt = <1800000>;
579 regulator-max-microvolt = <1800000>;
580 regulator-name = "vcc_1v8_s3";
581
582 regulator-state-mem {
583 regulator-on-in-suspend;
584 regulator-suspend-microvolt = <1800000>;
585 };
586 };
587
588 avcc_1v8_s0: pldo-reg1 {
589 regulator-always-on;
590 regulator-boot-on;
591 regulator-min-microvolt = <1800000>;
592 regulator-max-microvolt = <1800000>;
593 regulator-name = "avcc_1v8_s0";
594
595 regulator-state-mem {
596 regulator-off-in-suspend;
597 };
598 };
599
600 vcc_1v8_s0: pldo-reg2 {
601 regulator-always-on;
602 regulator-boot-on;
603 regulator-min-microvolt = <1800000>;
604 regulator-max-microvolt = <1800000>;
605 regulator-name = "vcc_1v8_s0";
606
607 regulator-state-mem {
608 regulator-off-in-suspend;
609 regulator-suspend-microvolt = <1800000>;
610 };
611 };
612
613 avdd_1v2_s0: pldo-reg3 {
614 regulator-always-on;
615 regulator-boot-on;
616 regulator-min-microvolt = <1200000>;
617 regulator-max-microvolt = <1200000>;
618 regulator-name = "avdd_1v2_s0";
619
620 regulator-state-mem {
621 regulator-off-in-suspend;
622 };
623 };
624
625 vcc_3v3_s0: pldo-reg4 {
626 regulator-always-on;
627 regulator-boot-on;
628 regulator-min-microvolt = <3300000>;
629 regulator-max-microvolt = <3300000>;
630 regulator-ramp-delay = <12500>;
631 regulator-name = "vcc_3v3_s0";
632
633 regulator-state-mem {
634 regulator-off-in-suspend;
635 };
636 };
637
638 vccio_sd_s0: pldo-reg5 {
639 regulator-always-on;
640 regulator-boot-on;
641 regulator-min-microvolt = <1800000>;
642 regulator-max-microvolt = <3300000>;
643 regulator-ramp-delay = <12500>;
644 regulator-name = "vccio_sd_s0";
645
646 regulator-state-mem {
647 regulator-off-in-suspend;
648 };
649 };
650
651 pldo6_s3: pldo-reg6 {
652 regulator-always-on;
653 regulator-boot-on;
654 regulator-min-microvolt = <1800000>;
655 regulator-max-microvolt = <1800000>;
656 regulator-name = "pldo6_s3";
657
658 regulator-state-mem {
659 regulator-on-in-suspend;
660 regulator-suspend-microvolt = <1800000>;
661 };
662 };
663
664 vdd_0v75_s3: nldo-reg1 {
665 regulator-always-on;
666 regulator-boot-on;
667 regulator-min-microvolt = <750000>;
668 regulator-max-microvolt = <750000>;
669 regulator-name = "vdd_0v75_s3";
670
671 regulator-state-mem {
672 regulator-on-in-suspend;
673 regulator-suspend-microvolt = <750000>;
674 };
675 };
676
677 vdd_ddr_pll_s0: nldo-reg2 {
678 regulator-always-on;
679 regulator-boot-on;
680 regulator-min-microvolt = <850000>;
681 regulator-max-microvolt = <850000>;
682 regulator-name = "vdd_ddr_pll_s0";
683
684 regulator-state-mem {
685 regulator-off-in-suspend;
686 regulator-suspend-microvolt = <850000>;
687 };
688 };
689
690 avdd_0v75_s0: nldo-reg3 {
691 regulator-always-on;
692 regulator-boot-on;
693 regulator-min-microvolt = <750000>;
694 regulator-max-microvolt = <750000>;
695 regulator-name = "avdd_0v75_s0";
696
697 regulator-state-mem {
698 regulator-off-in-suspend;
699 };
700 };
701
702 vdd_0v85_s0: nldo-reg4 {
703 regulator-always-on;
704 regulator-boot-on;
705 regulator-min-microvolt = <850000>;
706 regulator-max-microvolt = <850000>;
707 regulator-name = "vdd_0v85_s0";
708
709 regulator-state-mem {
710 regulator-off-in-suspend;
711 };
712 };
713
714 vdd_0v75_s0: nldo-reg5 {
715 regulator-always-on;
716 regulator-boot-on;
717 regulator-min-microvolt = <750000>;
718 regulator-max-microvolt = <750000>;
719 regulator-name = "vdd_0v75_s0";
720
721 regulator-state-mem {
722 regulator-off-in-suspend;
723 };
724 };
725 };
726 };
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200727};
728
729&uart2 {
730 pinctrl-0 = <&uart2m0_xfer>;
731 status = "okay";
732};
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900733
734&u2phy2 {
735 status = "okay";
736};
737
738&u2phy2_host {
739 /* connected to USB hub, which is powered by vcc5v0_sys */
740 phy-supply = <&vcc5v0_sys>;
741 status = "okay";
742};
743
744&u2phy3 {
745 status = "okay";
746};
747
748&u2phy3_host {
749 phy-supply = <&vcc5v0_host>;
750 status = "okay";
751};
752
753&usb_host0_ehci {
754 status = "okay";
755};
756
757&usb_host0_ohci {
758 status = "okay";
759};
760
761&usb_host1_ehci {
762 status = "okay";
763};
764
765&usb_host1_ohci {
766 status = "okay";
767};