Kever Yang | b877fa0 | 2019-03-29 09:09:00 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2019 Rockchip Electronics Co., Ltd |
| 4 | */ |
| 5 | #include <asm/io.h> |
| 6 | #include <asm/arch-rockchip/grf_rk3036.h> |
| 7 | #include <asm/arch-rockchip/hardware.h> |
Kever Yang | 80dd662 | 2019-07-22 20:02:03 +0800 | [diff] [blame] | 8 | #include <asm/arch-rockchip/sdram_rk3036.h> |
| 9 | |
| 10 | DECLARE_GLOBAL_DATA_PTR; |
Kever Yang | b877fa0 | 2019-03-29 09:09:00 +0800 | [diff] [blame] | 11 | |
| 12 | #ifdef CONFIG_DEBUG_UART_BOARD_INIT |
| 13 | void board_debug_uart_init(void) |
| 14 | { |
| 15 | #define GRF_BASE 0x20008000 |
| 16 | struct rk3036_grf * const grf = (void *)GRF_BASE; |
| 17 | enum { |
| 18 | GPIO1C3_SHIFT = 6, |
| 19 | GPIO1C3_MASK = 3 << GPIO1C3_SHIFT, |
| 20 | GPIO1C3_GPIO = 0, |
| 21 | GPIO1C3_MMC0_D1, |
| 22 | GPIO1C3_UART2_SOUT, |
| 23 | |
| 24 | GPIO1C2_SHIFT = 4, |
| 25 | GPIO1C2_MASK = 3 << GPIO1C2_SHIFT, |
| 26 | GPIO1C2_GPIO = 0, |
| 27 | GPIO1C2_MMC0_D0, |
| 28 | GPIO1C2_UART2_SIN, |
| 29 | }; |
| 30 | /* |
| 31 | * NOTE: sd card and debug uart use same iomux in rk3036, |
| 32 | * so if you enable uart, |
| 33 | * you can not boot from sdcard |
| 34 | */ |
| 35 | rk_clrsetreg(&grf->gpio1c_iomux, |
| 36 | GPIO1C3_MASK << GPIO1C3_SHIFT | |
| 37 | GPIO1C2_MASK << GPIO1C2_SHIFT, |
| 38 | GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT | |
| 39 | GPIO1C2_UART2_SIN << GPIO1C2_SHIFT); |
| 40 | } |
| 41 | #endif |
Kever Yang | 80dd662 | 2019-07-22 20:02:03 +0800 | [diff] [blame] | 42 | |
| 43 | #if !CONFIG_IS_ENABLED(RAM) |
| 44 | /* |
| 45 | * When CONFIG_RAM is enabled, the dram_init() function is implemented |
| 46 | * in sdram_common.c. |
| 47 | */ |
| 48 | int dram_init(void) |
| 49 | { |
| 50 | gd->ram_size = sdram_size(); |
| 51 | |
| 52 | return 0; |
| 53 | } |
| 54 | #endif |