blob: ac9a75bf2dea11a53e04475d7bed25c0efa48e17 [file] [log] [blame]
Shawn Guoec907a02019-07-07 20:59:55 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2019 Linaro Ltd.
4 * Copyright (C) 2016 NXP Semiconductors
5 *
6 * Configuration settings for Meerkat96 board.
7 */
8
9#ifndef __MEERKAT96_CONFIG_H
10#define __MEERKAT96_CONFIG_H
11
12#include "mx7_common.h"
13#include <imximage.h>
14
15#define PHYS_SDRAM_SIZE SZ_512M
16
Shawn Guoec907a02019-07-07 20:59:55 +080017#define CONFIG_SYS_HZ 1000
18
19/* Physical Memory Map */
20#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
21
22#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
23#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
24#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
25
26#define CONFIG_SYS_INIT_SP_OFFSET \
27 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
28#define CONFIG_SYS_INIT_SP_ADDR \
29 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
30
31/* Environment configs */
Shawn Guoec907a02019-07-07 20:59:55 +080032
33/* USB configs */
34#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
35#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
36
37#endif