blob: ef8cdc6a16b4f4bfbbd458bf5f236fc64dd63bd5 [file] [log] [blame]
Marek Vasuta8c01e02018-02-26 10:35:15 +01001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77965 SoC
4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
10
Marek Vasutab9fbe92018-12-03 21:43:05 +010011#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
Marek Vasuta8c01e02018-02-26 10:35:15 +010012#include <dt-bindings/interrupt-controller/arm-gic.h>
Marek Vasutab9fbe92018-12-03 21:43:05 +010013#include <dt-bindings/power/r8a77965-sysc.h>
Marek Vasuta8c01e02018-02-26 10:35:15 +010014
15#define CPG_AUDIO_CLK_I 10
16
17/ {
18 compatible = "renesas,r8a77965";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
Marek Vasut051a5262018-06-06 20:03:30 +020022 aliases {
Marek Vasutab9fbe92018-12-03 21:43:05 +010023 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
Marek Vasut051a5262018-06-06 20:03:30 +020030 i2c7 = &i2c_dvfs;
31 };
32
Marek Vasutab9fbe92018-12-03 21:43:05 +010033 /*
34 * The external audio clocks are configured as 0 Hz fixed frequency
35 * clocks by default.
36 * Boards that provide audio clocks should override them.
37 */
38 audio_clk_a: audio_clk_a {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
42 };
43
44 audio_clk_b: audio_clk_b {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <0>;
48 };
49
50 audio_clk_c: audio_clk_c {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
Marek Vasuta8c01e02018-02-26 10:35:15 +010054 };
55
Marek Vasutab9fbe92018-12-03 21:43:05 +010056 /* External CAN clock - to be overridden by boards that provide it */
57 can_clk: can {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
61 };
62
Marek Vasuta8c01e02018-02-26 10:35:15 +010063 cpus {
64 #address-cells = <1>;
65 #size-cells = <0>;
66
67 a57_0: cpu@0 {
68 compatible = "arm,cortex-a57", "arm,armv8";
69 reg = <0x0>;
70 device_type = "cpu";
Marek Vasutab9fbe92018-12-03 21:43:05 +010071 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
Marek Vasuta8c01e02018-02-26 10:35:15 +010072 next-level-cache = <&L2_CA57>;
73 enable-method = "psci";
74 };
75
76 a57_1: cpu@1 {
Marek Vasutab9fbe92018-12-03 21:43:05 +010077 compatible = "arm,cortex-a57", "arm,armv8";
Marek Vasuta8c01e02018-02-26 10:35:15 +010078 reg = <0x1>;
79 device_type = "cpu";
Marek Vasutab9fbe92018-12-03 21:43:05 +010080 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
Marek Vasuta8c01e02018-02-26 10:35:15 +010081 next-level-cache = <&L2_CA57>;
82 enable-method = "psci";
83 };
84
85 L2_CA57: cache-controller-0 {
86 compatible = "cache";
Marek Vasutab9fbe92018-12-03 21:43:05 +010087 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
Marek Vasuta8c01e02018-02-26 10:35:15 +010088 cache-unified;
89 cache-level = <2>;
90 };
91 };
92
93 extal_clk: extal {
94 compatible = "fixed-clock";
95 #clock-cells = <0>;
96 /* This value must be overridden by the board */
97 clock-frequency = <0>;
98 };
99
100 extalr_clk: extalr {
101 compatible = "fixed-clock";
102 #clock-cells = <0>;
103 /* This value must be overridden by the board */
104 clock-frequency = <0>;
105 };
106
Marek Vasutab9fbe92018-12-03 21:43:05 +0100107 /* External PCIe clock - can be overridden by the board */
108 pcie_bus_clk: pcie_bus {
Marek Vasuta8c01e02018-02-26 10:35:15 +0100109 compatible = "fixed-clock";
110 #clock-cells = <0>;
111 clock-frequency = <0>;
112 };
113
Marek Vasutab9fbe92018-12-03 21:43:05 +0100114 pmu_a57 {
115 compatible = "arm,cortex-a57-pmu";
116 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
117 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
118 interrupt-affinity = <&a57_0>,
119 <&a57_1>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100120 };
121
Marek Vasutab9fbe92018-12-03 21:43:05 +0100122 psci {
123 compatible = "arm,psci-1.0", "arm,psci-0.2";
124 method = "smc";
Marek Vasuta8c01e02018-02-26 10:35:15 +0100125 };
126
127 /* External SCIF clock - to be overridden by boards that provide it */
128 scif_clk: scif {
129 compatible = "fixed-clock";
130 #clock-cells = <0>;
131 clock-frequency = <0>;
132 };
133
Marek Vasut6582a212018-12-03 21:05:55 +0100134 soc: soc {
Marek Vasuta8c01e02018-02-26 10:35:15 +0100135 compatible = "simple-bus";
136 interrupt-parent = <&gic>;
137 #address-cells = <2>;
138 #size-cells = <2>;
139 ranges;
140
Marek Vasutab9fbe92018-12-03 21:43:05 +0100141 rwdt: watchdog@e6020000 {
142 compatible = "renesas,r8a77965-wdt",
143 "renesas,rcar-gen3-wdt";
144 reg = <0 0xe6020000 0 0x0c>;
145 clocks = <&cpg CPG_MOD 402>;
146 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
147 resets = <&cpg 402>;
148 status = "disabled";
Marek Vasuta8c01e02018-02-26 10:35:15 +0100149 };
150
151 gpio0: gpio@e6050000 {
152 compatible = "renesas,gpio-r8a77965",
153 "renesas,rcar-gen3-gpio";
154 reg = <0 0xe6050000 0 0x50>;
155 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
156 #gpio-cells = <2>;
157 gpio-controller;
158 gpio-ranges = <&pfc 0 0 16>;
159 #interrupt-cells = <2>;
160 interrupt-controller;
161 clocks = <&cpg CPG_MOD 912>;
Marek Vasutab9fbe92018-12-03 21:43:05 +0100162 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100163 resets = <&cpg 912>;
164 };
165
166 gpio1: gpio@e6051000 {
167 compatible = "renesas,gpio-r8a77965",
168 "renesas,rcar-gen3-gpio";
169 reg = <0 0xe6051000 0 0x50>;
170 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
171 #gpio-cells = <2>;
172 gpio-controller;
173 gpio-ranges = <&pfc 0 32 29>;
174 #interrupt-cells = <2>;
175 interrupt-controller;
176 clocks = <&cpg CPG_MOD 911>;
Marek Vasutab9fbe92018-12-03 21:43:05 +0100177 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100178 resets = <&cpg 911>;
179 };
180
181 gpio2: gpio@e6052000 {
182 compatible = "renesas,gpio-r8a77965",
183 "renesas,rcar-gen3-gpio";
184 reg = <0 0xe6052000 0 0x50>;
185 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
186 #gpio-cells = <2>;
187 gpio-controller;
188 gpio-ranges = <&pfc 0 64 15>;
189 #interrupt-cells = <2>;
190 interrupt-controller;
191 clocks = <&cpg CPG_MOD 910>;
Marek Vasutab9fbe92018-12-03 21:43:05 +0100192 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100193 resets = <&cpg 910>;
194 };
195
196 gpio3: gpio@e6053000 {
197 compatible = "renesas,gpio-r8a77965",
198 "renesas,rcar-gen3-gpio";
199 reg = <0 0xe6053000 0 0x50>;
200 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
201 #gpio-cells = <2>;
202 gpio-controller;
203 gpio-ranges = <&pfc 0 96 16>;
204 #interrupt-cells = <2>;
205 interrupt-controller;
206 clocks = <&cpg CPG_MOD 909>;
Marek Vasutab9fbe92018-12-03 21:43:05 +0100207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100208 resets = <&cpg 909>;
209 };
210
211 gpio4: gpio@e6054000 {
212 compatible = "renesas,gpio-r8a77965",
213 "renesas,rcar-gen3-gpio";
214 reg = <0 0xe6054000 0 0x50>;
215 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
216 #gpio-cells = <2>;
217 gpio-controller;
218 gpio-ranges = <&pfc 0 128 18>;
219 #interrupt-cells = <2>;
220 interrupt-controller;
221 clocks = <&cpg CPG_MOD 908>;
Marek Vasutab9fbe92018-12-03 21:43:05 +0100222 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100223 resets = <&cpg 908>;
224 };
225
226 gpio5: gpio@e6055000 {
227 compatible = "renesas,gpio-r8a77965",
228 "renesas,rcar-gen3-gpio";
229 reg = <0 0xe6055000 0 0x50>;
230 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
231 #gpio-cells = <2>;
232 gpio-controller;
233 gpio-ranges = <&pfc 0 160 26>;
234 #interrupt-cells = <2>;
235 interrupt-controller;
236 clocks = <&cpg CPG_MOD 907>;
Marek Vasutab9fbe92018-12-03 21:43:05 +0100237 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100238 resets = <&cpg 907>;
239 };
240
241 gpio6: gpio@e6055400 {
242 compatible = "renesas,gpio-r8a77965",
243 "renesas,rcar-gen3-gpio";
244 reg = <0 0xe6055400 0 0x50>;
245 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
246 #gpio-cells = <2>;
247 gpio-controller;
248 gpio-ranges = <&pfc 0 192 32>;
249 #interrupt-cells = <2>;
250 interrupt-controller;
251 clocks = <&cpg CPG_MOD 906>;
Marek Vasutab9fbe92018-12-03 21:43:05 +0100252 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100253 resets = <&cpg 906>;
254 };
255
256 gpio7: gpio@e6055800 {
257 compatible = "renesas,gpio-r8a77965",
258 "renesas,rcar-gen3-gpio";
259 reg = <0 0xe6055800 0 0x50>;
260 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
261 #gpio-cells = <2>;
262 gpio-controller;
263 gpio-ranges = <&pfc 0 224 4>;
264 #interrupt-cells = <2>;
265 interrupt-controller;
266 clocks = <&cpg CPG_MOD 905>;
Marek Vasutab9fbe92018-12-03 21:43:05 +0100267 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100268 resets = <&cpg 905>;
269 };
270
Marek Vasutab9fbe92018-12-03 21:43:05 +0100271 pfc: pin-controller@e6060000 {
272 compatible = "renesas,pfc-r8a77965";
273 reg = <0 0xe6060000 0 0x50c>;
274 };
275
276 cpg: clock-controller@e6150000 {
277 compatible = "renesas,r8a77965-cpg-mssr";
278 reg = <0 0xe6150000 0 0x1000>;
279 clocks = <&extal_clk>, <&extalr_clk>;
280 clock-names = "extal", "extalr";
281 #clock-cells = <2>;
282 #power-domain-cells = <0>;
283 #reset-cells = <1>;
284 };
285
286 rst: reset-controller@e6160000 {
287 compatible = "renesas,r8a77965-rst";
288 reg = <0 0xe6160000 0 0x0200>;
289 };
290
291 sysc: system-controller@e6180000 {
292 compatible = "renesas,r8a77965-sysc";
293 reg = <0 0xe6180000 0 0x0400>;
294 #power-domain-cells = <1>;
295 };
296
297 tsc: thermal@e6198000 {
298 compatible = "renesas,r8a77965-thermal";
299 reg = <0 0xe6198000 0 0x100>,
300 <0 0xe61a0000 0 0x100>,
301 <0 0xe61a8000 0 0x100>;
302 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
303 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
304 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
305 clocks = <&cpg CPG_MOD 522>;
306 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
307 resets = <&cpg 522>;
308 #thermal-sensor-cells = <1>;
309 status = "okay";
310 };
311
Marek Vasuta8c01e02018-02-26 10:35:15 +0100312 intc_ex: interrupt-controller@e61c0000 {
Marek Vasut051a5262018-06-06 20:03:30 +0200313 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
314 #interrupt-cells = <2>;
315 interrupt-controller;
316 reg = <0 0xe61c0000 0 0x200>;
317 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
318 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
319 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
320 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
321 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
322 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
323 clocks = <&cpg CPG_MOD 407>;
Marek Vasutab9fbe92018-12-03 21:43:05 +0100324 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
Marek Vasut051a5262018-06-06 20:03:30 +0200325 resets = <&cpg 407>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100326 };
327
Marek Vasutab9fbe92018-12-03 21:43:05 +0100328 i2c0: i2c@e6500000 {
329 #address-cells = <1>;
330 #size-cells = <0>;
331 compatible = "renesas,i2c-r8a77965",
332 "renesas,rcar-gen3-i2c";
333 reg = <0 0xe6500000 0 0x40>;
334 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
335 clocks = <&cpg CPG_MOD 931>;
336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
337 resets = <&cpg 931>;
338 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
339 <&dmac2 0x91>, <&dmac2 0x90>;
340 dma-names = "tx", "rx", "tx", "rx";
341 i2c-scl-internal-delay-ns = <110>;
342 status = "disabled";
Marek Vasuta8c01e02018-02-26 10:35:15 +0100343 };
344
Marek Vasutab9fbe92018-12-03 21:43:05 +0100345 i2c1: i2c@e6508000 {
346 #address-cells = <1>;
347 #size-cells = <0>;
348 compatible = "renesas,i2c-r8a77965",
349 "renesas,rcar-gen3-i2c";
350 reg = <0 0xe6508000 0 0x40>;
351 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
352 clocks = <&cpg CPG_MOD 930>;
353 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
354 resets = <&cpg 930>;
355 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
356 <&dmac2 0x93>, <&dmac2 0x92>;
357 dma-names = "tx", "rx", "tx", "rx";
358 i2c-scl-internal-delay-ns = <6>;
359 status = "disabled";
Marek Vasuta8c01e02018-02-26 10:35:15 +0100360 };
361
Marek Vasutab9fbe92018-12-03 21:43:05 +0100362 i2c2: i2c@e6510000 {
363 #address-cells = <1>;
364 #size-cells = <0>;
365 compatible = "renesas,i2c-r8a77965",
366 "renesas,rcar-gen3-i2c";
367 reg = <0 0xe6510000 0 0x40>;
368 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 929>;
370 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
371 resets = <&cpg 929>;
372 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
373 <&dmac2 0x95>, <&dmac2 0x94>;
374 dma-names = "tx", "rx", "tx", "rx";
375 i2c-scl-internal-delay-ns = <6>;
376 status = "disabled";
Marek Vasuta8c01e02018-02-26 10:35:15 +0100377 };
378
Marek Vasutab9fbe92018-12-03 21:43:05 +0100379 i2c3: i2c@e66d0000 {
380 #address-cells = <1>;
381 #size-cells = <0>;
382 compatible = "renesas,i2c-r8a77965",
383 "renesas,rcar-gen3-i2c";
384 reg = <0 0xe66d0000 0 0x40>;
385 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
386 clocks = <&cpg CPG_MOD 928>;
387 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
388 resets = <&cpg 928>;
389 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
390 dma-names = "tx", "rx";
391 i2c-scl-internal-delay-ns = <110>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100392 status = "disabled";
393 };
394
Marek Vasutab9fbe92018-12-03 21:43:05 +0100395 i2c4: i2c@e66d8000 {
396 #address-cells = <1>;
397 #size-cells = <0>;
398 compatible = "renesas,i2c-r8a77965",
399 "renesas,rcar-gen3-i2c";
400 reg = <0 0xe66d8000 0 0x40>;
401 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
402 clocks = <&cpg CPG_MOD 927>;
403 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
404 resets = <&cpg 927>;
405 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
406 dma-names = "tx", "rx";
407 i2c-scl-internal-delay-ns = <110>;
408 status = "disabled";
409 };
410
411 i2c5: i2c@e66e0000 {
412 #address-cells = <1>;
413 #size-cells = <0>;
414 compatible = "renesas,i2c-r8a77965",
415 "renesas,rcar-gen3-i2c";
416 reg = <0 0xe66e0000 0 0x40>;
417 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
418 clocks = <&cpg CPG_MOD 919>;
419 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
420 resets = <&cpg 919>;
421 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
422 dma-names = "tx", "rx";
423 i2c-scl-internal-delay-ns = <110>;
424 status = "disabled";
425 };
426
427 i2c6: i2c@e66e8000 {
428 #address-cells = <1>;
429 #size-cells = <0>;
430 compatible = "renesas,i2c-r8a77965",
431 "renesas,rcar-gen3-i2c";
432 reg = <0 0xe66e8000 0 0x40>;
433 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
434 clocks = <&cpg CPG_MOD 918>;
435 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
436 resets = <&cpg 918>;
437 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
438 dma-names = "tx", "rx";
439 i2c-scl-internal-delay-ns = <6>;
440 status = "disabled";
441 };
442
443 i2c_dvfs: i2c@e60b0000 {
444 #address-cells = <1>;
445 #size-cells = <0>;
446 compatible = "renesas,iic-r8a77965",
447 "renesas,rcar-gen3-iic",
448 "renesas,rmobile-iic";
449 reg = <0 0xe60b0000 0 0x425>;
450 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
451 clocks = <&cpg CPG_MOD 926>;
452 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
453 resets = <&cpg 926>;
454 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
455 dma-names = "tx", "rx";
456 status = "disabled";
457 };
458
459 hscif0: serial@e6540000 {
460 compatible = "renesas,hscif-r8a77965",
461 "renesas,rcar-gen3-hscif",
462 "renesas,hscif";
463 reg = <0 0xe6540000 0 0x60>;
464 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
465 clocks = <&cpg CPG_MOD 520>,
466 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
Marek Vasuta8c01e02018-02-26 10:35:15 +0100467 <&scif_clk>;
468 clock-names = "fck", "brg_int", "scif_clk";
Marek Vasutab9fbe92018-12-03 21:43:05 +0100469 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
470 <&dmac2 0x31>, <&dmac2 0x30>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100471 dma-names = "tx", "rx", "tx", "rx";
Marek Vasutab9fbe92018-12-03 21:43:05 +0100472 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
473 resets = <&cpg 520>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100474 status = "disabled";
475 };
476
Marek Vasutab9fbe92018-12-03 21:43:05 +0100477 hscif1: serial@e6550000 {
478 compatible = "renesas,hscif-r8a77965",
479 "renesas,rcar-gen3-hscif",
480 "renesas,hscif";
481 reg = <0 0xe6550000 0 0x60>;
482 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
483 clocks = <&cpg CPG_MOD 519>,
484 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
Marek Vasuta8c01e02018-02-26 10:35:15 +0100485 <&scif_clk>;
486 clock-names = "fck", "brg_int", "scif_clk";
Marek Vasutab9fbe92018-12-03 21:43:05 +0100487 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
488 <&dmac2 0x33>, <&dmac2 0x32>;
489 dma-names = "tx", "rx", "tx", "rx";
490 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
491 resets = <&cpg 519>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100492 status = "disabled";
493 };
494
Marek Vasutab9fbe92018-12-03 21:43:05 +0100495 hscif2: serial@e6560000 {
496 compatible = "renesas,hscif-r8a77965",
497 "renesas,rcar-gen3-hscif",
498 "renesas,hscif";
499 reg = <0 0xe6560000 0 0x60>;
500 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
501 clocks = <&cpg CPG_MOD 518>,
502 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
Marek Vasuta8c01e02018-02-26 10:35:15 +0100503 <&scif_clk>;
504 clock-names = "fck", "brg_int", "scif_clk";
Marek Vasutab9fbe92018-12-03 21:43:05 +0100505 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
506 <&dmac2 0x35>, <&dmac2 0x34>;
507 dma-names = "tx", "rx", "tx", "rx";
508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
509 resets = <&cpg 518>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100510 status = "disabled";
511 };
512
Marek Vasutab9fbe92018-12-03 21:43:05 +0100513 hscif3: serial@e66a0000 {
514 compatible = "renesas,hscif-r8a77965",
515 "renesas,rcar-gen3-hscif",
516 "renesas,hscif";
517 reg = <0 0xe66a0000 0 0x60>;
518 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
519 clocks = <&cpg CPG_MOD 517>,
520 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
Marek Vasuta8c01e02018-02-26 10:35:15 +0100521 <&scif_clk>;
522 clock-names = "fck", "brg_int", "scif_clk";
Marek Vasutab9fbe92018-12-03 21:43:05 +0100523 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100524 dma-names = "tx", "rx";
Marek Vasutab9fbe92018-12-03 21:43:05 +0100525 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
526 resets = <&cpg 517>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100527 status = "disabled";
528 };
529
Marek Vasutab9fbe92018-12-03 21:43:05 +0100530 hscif4: serial@e66b0000 {
531 compatible = "renesas,hscif-r8a77965",
532 "renesas,rcar-gen3-hscif",
533 "renesas,hscif";
534 reg = <0 0xe66b0000 0 0x60>;
535 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
536 clocks = <&cpg CPG_MOD 516>,
537 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
Marek Vasuta8c01e02018-02-26 10:35:15 +0100538 <&scif_clk>;
539 clock-names = "fck", "brg_int", "scif_clk";
Marek Vasutab9fbe92018-12-03 21:43:05 +0100540 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
541 dma-names = "tx", "rx";
542 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
543 resets = <&cpg 516>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100544 status = "disabled";
545 };
546
Marek Vasutab9fbe92018-12-03 21:43:05 +0100547 hsusb: usb@e6590000 {
548 compatible = "renesas,usbhs-r8a7796",
549 "renesas,rcar-gen3-usbhs";
550 reg = <0 0xe6590000 0 0x100>;
551 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
552 clocks = <&cpg CPG_MOD 704>;
553 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
554 <&usb_dmac1 0>, <&usb_dmac1 1>;
555 dma-names = "ch0", "ch1", "ch2", "ch3";
556 renesas,buswait = <11>;
557 phys = <&usb2_phy0>;
558 phy-names = "usb";
559 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
560 resets = <&cpg 704>;
Marek Vasut5f0a8002018-03-01 21:50:56 +0100561 status = "disabled";
Marek Vasuta8c01e02018-02-26 10:35:15 +0100562 };
563
Marek Vasutab9fbe92018-12-03 21:43:05 +0100564 usb_dmac0: dma-controller@e65a0000 {
565 compatible = "renesas,r8a77965-usb-dmac",
566 "renesas,usb-dmac";
567 reg = <0 0xe65a0000 0 0x100>;
568 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
569 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
570 interrupt-names = "ch0", "ch1";
571 clocks = <&cpg CPG_MOD 330>;
572 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
573 resets = <&cpg 330>;
574 #dma-cells = <1>;
575 dma-channels = <2>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100576 };
577
Marek Vasutab9fbe92018-12-03 21:43:05 +0100578 usb_dmac1: dma-controller@e65b0000 {
579 compatible = "renesas,r8a77965-usb-dmac",
580 "renesas,usb-dmac";
581 reg = <0 0xe65b0000 0 0x100>;
582 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
583 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
584 interrupt-names = "ch0", "ch1";
585 clocks = <&cpg CPG_MOD 331>;
586 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
587 resets = <&cpg 331>;
588 #dma-cells = <1>;
589 dma-channels = <2>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100590 };
591
Marek Vasutab9fbe92018-12-03 21:43:05 +0100592 usb3_phy0: usb-phy@e65ee000 {
593 compatible = "renesas,r8a77965-usb3-phy",
594 "renesas,rcar-gen3-usb3-phy";
595 reg = <0 0xe65ee000 0 0x90>;
596 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
597 <&usb_extal_clk>;
598 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
599 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
600 resets = <&cpg 328>;
601 #phy-cells = <0>;
602 status = "disabled";
Marek Vasuta8c01e02018-02-26 10:35:15 +0100603 };
604
Marek Vasutab9fbe92018-12-03 21:43:05 +0100605 dmac0: dma-controller@e6700000 {
606 compatible = "renesas,dmac-r8a77965",
607 "renesas,rcar-dmac";
608 reg = <0 0xe6700000 0 0x10000>;
609 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
610 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
611 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
612 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
613 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
614 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
615 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
616 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
617 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
618 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
619 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
620 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
621 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
622 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
623 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
624 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
625 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
626 interrupt-names = "error",
627 "ch0", "ch1", "ch2", "ch3",
628 "ch4", "ch5", "ch6", "ch7",
629 "ch8", "ch9", "ch10", "ch11",
630 "ch12", "ch13", "ch14", "ch15";
631 clocks = <&cpg CPG_MOD 219>;
632 clock-names = "fck";
633 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
634 resets = <&cpg 219>;
635 #dma-cells = <1>;
636 dma-channels = <16>;
Marek Vasuta8c01e02018-02-26 10:35:15 +0100637 };
638
Marek Vasutab9fbe92018-12-03 21:43:05 +0100639 dmac1: dma-controller@e7300000 {
640 compatible = "renesas,dmac-r8a77965",
641 "renesas,rcar-dmac";
642 reg = <0 0xe7300000 0 0x10000>;
643 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
644 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
645 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
646 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
647 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
648 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
649 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
650 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
651 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
652 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
653 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
654 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
655 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
656 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
657 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
658 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
659 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
660 interrupt-names = "error",
661 "ch0", "ch1", "ch2", "ch3",
662 "ch4", "ch5", "ch6", "ch7",
663 "ch8", "ch9", "ch10", "ch11",
664 "ch12", "ch13", "ch14", "ch15";
665 clocks = <&cpg CPG_MOD 218>;
666 clock-names = "fck";
667 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
668 resets = <&cpg 218>;
669 #dma-cells = <1>;
670 dma-channels = <16>;
671 };
672
673 dmac2: dma-controller@e7310000 {
674 compatible = "renesas,dmac-r8a77965",
675 "renesas,rcar-dmac";
676 reg = <0 0xe7310000 0 0x10000>;
677 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
678 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
679 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
680 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
681 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
682 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
683 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
684 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
685 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
686 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
687 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
688 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
689 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
690 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
691 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
692 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
693 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
694 interrupt-names = "error",
695 "ch0", "ch1", "ch2", "ch3",
696 "ch4", "ch5", "ch6", "ch7",
697 "ch8", "ch9", "ch10", "ch11",
698 "ch12", "ch13", "ch14", "ch15";
699 clocks = <&cpg CPG_MOD 217>;
700 clock-names = "fck";
701 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
702 resets = <&cpg 217>;
703 #dma-cells = <1>;
704 dma-channels = <16>;
705 };
706
707 ipmmu_ds0: mmu@e6740000 {
708 compatible = "renesas,ipmmu-r8a77965";
709 reg = <0 0xe6740000 0 0x1000>;
710 renesas,ipmmu-main = <&ipmmu_mm 0>;
711 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
712 #iommu-cells = <1>;
713 };
714
715 ipmmu_ds1: mmu@e7740000 {
716 compatible = "renesas,ipmmu-r8a77965";
717 reg = <0 0xe7740000 0 0x1000>;
718 renesas,ipmmu-main = <&ipmmu_mm 1>;
719 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
720 #iommu-cells = <1>;
721 };
722
723 ipmmu_hc: mmu@e6570000 {
724 compatible = "renesas,ipmmu-r8a77965";
725 reg = <0 0xe6570000 0 0x1000>;
726 renesas,ipmmu-main = <&ipmmu_mm 2>;
727 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
728 #iommu-cells = <1>;
729 };
730
731 ipmmu_ir: mmu@ff8b0000 {
732 compatible = "renesas,ipmmu-r8a77965";
733 reg = <0 0xff8b0000 0 0x1000>;
734 renesas,ipmmu-main = <&ipmmu_mm 3>;
735 power-domains = <&sysc R8A77965_PD_A3IR>;
736 #iommu-cells = <1>;
737 };
738
739 ipmmu_mm: mmu@e67b0000 {
740 compatible = "renesas,ipmmu-r8a77965";
741 reg = <0 0xe67b0000 0 0x1000>;
742 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
743 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
744 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
745 #iommu-cells = <1>;
746 };
747
748 ipmmu_mp: mmu@ec670000 {
749 compatible = "renesas,ipmmu-r8a77965";
750 reg = <0 0xec670000 0 0x1000>;
751 renesas,ipmmu-main = <&ipmmu_mm 4>;
752 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
753 #iommu-cells = <1>;
754 };
755
756 ipmmu_pv0: mmu@fd800000 {
757 compatible = "renesas,ipmmu-r8a77965";
758 reg = <0 0xfd800000 0 0x1000>;
759 renesas,ipmmu-main = <&ipmmu_mm 6>;
760 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
761 #iommu-cells = <1>;
762 };
763
764 ipmmu_rt: mmu@ffc80000 {
765 compatible = "renesas,ipmmu-r8a77965";
766 reg = <0 0xffc80000 0 0x1000>;
767 renesas,ipmmu-main = <&ipmmu_mm 10>;
768 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
769 #iommu-cells = <1>;
770 };
771
772 ipmmu_vc0: mmu@fe6b0000 {
773 compatible = "renesas,ipmmu-r8a77965";
774 reg = <0 0xfe6b0000 0 0x1000>;
775 renesas,ipmmu-main = <&ipmmu_mm 12>;
776 power-domains = <&sysc R8A77965_PD_A3VC>;
777 #iommu-cells = <1>;
778 };
779
780 ipmmu_vi0: mmu@febd0000 {
781 compatible = "renesas,ipmmu-r8a77965";
782 reg = <0 0xfebd0000 0 0x1000>;
783 renesas,ipmmu-main = <&ipmmu_mm 14>;
784 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
785 #iommu-cells = <1>;
786 };
787
788 ipmmu_vp0: mmu@fe990000 {
789 compatible = "renesas,ipmmu-r8a77965";
790 reg = <0 0xfe990000 0 0x1000>;
791 renesas,ipmmu-main = <&ipmmu_mm 16>;
792 power-domains = <&sysc R8A77965_PD_A3VP>;
793 #iommu-cells = <1>;
794 };
795
796 avb: ethernet@e6800000 {
797 compatible = "renesas,etheravb-r8a77965",
798 "renesas,etheravb-rcar-gen3";
799 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
800 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
801 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
805 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
806 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
807 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
808 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
818 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
819 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
820 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
821 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
825 interrupt-names = "ch0", "ch1", "ch2", "ch3",
826 "ch4", "ch5", "ch6", "ch7",
827 "ch8", "ch9", "ch10", "ch11",
828 "ch12", "ch13", "ch14", "ch15",
829 "ch16", "ch17", "ch18", "ch19",
830 "ch20", "ch21", "ch22", "ch23",
831 "ch24";
832 clocks = <&cpg CPG_MOD 812>;
833 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
834 resets = <&cpg 812>;
835 phy-mode = "rgmii";
836 #address-cells = <1>;
837 #size-cells = <0>;
838 status = "disabled";
839 };
840
841 pwm0: pwm@e6e30000 {
842 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
843 reg = <0 0xe6e30000 0 8>;
844 #pwm-cells = <2>;
845 clocks = <&cpg CPG_MOD 523>;
846 resets = <&cpg 523>;
847 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
848 status = "disabled";
849 };
850
851 pwm1: pwm@e6e31000 {
852 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
853 reg = <0 0xe6e31000 0 8>;
854 #pwm-cells = <2>;
855 clocks = <&cpg CPG_MOD 523>;
856 resets = <&cpg 523>;
857 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
858 status = "disabled";
859 };
860
861 pwm2: pwm@e6e32000 {
862 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
863 reg = <0 0xe6e32000 0 8>;
864 #pwm-cells = <2>;
865 clocks = <&cpg CPG_MOD 523>;
866 resets = <&cpg 523>;
867 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
868 status = "disabled";
869 };
870
871 pwm3: pwm@e6e33000 {
872 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
873 reg = <0 0xe6e33000 0 8>;
874 #pwm-cells = <2>;
875 clocks = <&cpg CPG_MOD 523>;
876 resets = <&cpg 523>;
877 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
878 status = "disabled";
879 };
880
881 pwm4: pwm@e6e34000 {
882 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
883 reg = <0 0xe6e34000 0 8>;
884 #pwm-cells = <2>;
885 clocks = <&cpg CPG_MOD 523>;
886 resets = <&cpg 523>;
887 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
888 status = "disabled";
889 };
890
891 pwm5: pwm@e6e35000 {
892 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
893 reg = <0 0xe6e35000 0 8>;
894 #pwm-cells = <2>;
895 clocks = <&cpg CPG_MOD 523>;
896 resets = <&cpg 523>;
897 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
898 status = "disabled";
899 };
900
901 pwm6: pwm@e6e36000 {
902 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
903 reg = <0 0xe6e36000 0 8>;
904 #pwm-cells = <2>;
905 clocks = <&cpg CPG_MOD 523>;
906 resets = <&cpg 523>;
907 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
908 status = "disabled";
909 };
910
911 scif0: serial@e6e60000 {
912 compatible = "renesas,scif-r8a77965",
913 "renesas,rcar-gen3-scif", "renesas,scif";
914 reg = <0 0xe6e60000 0 64>;
915 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
916 clocks = <&cpg CPG_MOD 207>,
917 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
918 <&scif_clk>;
919 clock-names = "fck", "brg_int", "scif_clk";
920 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
921 <&dmac2 0x51>, <&dmac2 0x50>;
922 dma-names = "tx", "rx", "tx", "rx";
923 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
924 resets = <&cpg 207>;
925 status = "disabled";
926 };
927
928 scif1: serial@e6e68000 {
929 compatible = "renesas,scif-r8a77965",
930 "renesas,rcar-gen3-scif", "renesas,scif";
931 reg = <0 0xe6e68000 0 64>;
932 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
933 clocks = <&cpg CPG_MOD 206>,
934 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
935 <&scif_clk>;
936 clock-names = "fck", "brg_int", "scif_clk";
937 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
938 <&dmac2 0x53>, <&dmac2 0x52>;
939 dma-names = "tx", "rx", "tx", "rx";
940 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
941 resets = <&cpg 206>;
942 status = "disabled";
943 };
944
945 scif2: serial@e6e88000 {
946 compatible = "renesas,scif-r8a77965",
947 "renesas,rcar-gen3-scif", "renesas,scif";
948 reg = <0 0xe6e88000 0 64>;
949 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
950 clocks = <&cpg CPG_MOD 310>,
951 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
952 <&scif_clk>;
953 clock-names = "fck", "brg_int", "scif_clk";
954 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
955 resets = <&cpg 310>;
956 status = "disabled";
957 };
958
959 scif3: serial@e6c50000 {
960 compatible = "renesas,scif-r8a77965",
961 "renesas,rcar-gen3-scif", "renesas,scif";
962 reg = <0 0xe6c50000 0 64>;
963 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
964 clocks = <&cpg CPG_MOD 204>,
965 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
966 <&scif_clk>;
967 clock-names = "fck", "brg_int", "scif_clk";
968 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
969 dma-names = "tx", "rx";
970 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
971 resets = <&cpg 204>;
972 status = "disabled";
973 };
974
975 scif4: serial@e6c40000 {
976 compatible = "renesas,scif-r8a77965",
977 "renesas,rcar-gen3-scif", "renesas,scif";
978 reg = <0 0xe6c40000 0 64>;
979 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
980 clocks = <&cpg CPG_MOD 203>,
981 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
982 <&scif_clk>;
983 clock-names = "fck", "brg_int", "scif_clk";
984 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
985 dma-names = "tx", "rx";
986 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
987 resets = <&cpg 203>;
988 status = "disabled";
989 };
990
991 scif5: serial@e6f30000 {
992 compatible = "renesas,scif-r8a77965",
993 "renesas,rcar-gen3-scif", "renesas,scif";
994 reg = <0 0xe6f30000 0 64>;
995 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
996 clocks = <&cpg CPG_MOD 202>,
997 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
998 <&scif_clk>;
999 clock-names = "fck", "brg_int", "scif_clk";
1000 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1001 <&dmac2 0x5b>, <&dmac2 0x5a>;
1002 dma-names = "tx", "rx", "tx", "rx";
1003 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1004 resets = <&cpg 202>;
1005 status = "disabled";
1006 };
1007
1008 msiof0: spi@e6e90000 {
1009 compatible = "renesas,msiof-r8a77965",
1010 "renesas,rcar-gen3-msiof";
1011 reg = <0 0xe6e90000 0 0x0064>;
1012 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1013 clocks = <&cpg CPG_MOD 211>;
1014 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1015 <&dmac2 0x41>, <&dmac2 0x40>;
1016 dma-names = "tx", "rx", "tx", "rx";
1017 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1018 resets = <&cpg 211>;
1019 #address-cells = <1>;
1020 #size-cells = <0>;
1021 status = "disabled";
1022 };
1023
1024 msiof1: spi@e6ea0000 {
1025 compatible = "renesas,msiof-r8a77965",
1026 "renesas,rcar-gen3-msiof";
1027 reg = <0 0xe6ea0000 0 0x0064>;
1028 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1029 clocks = <&cpg CPG_MOD 210>;
1030 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1031 <&dmac2 0x43>, <&dmac2 0x42>;
1032 dma-names = "tx", "rx", "tx", "rx";
1033 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1034 resets = <&cpg 210>;
1035 #address-cells = <1>;
1036 #size-cells = <0>;
1037 status = "disabled";
1038 };
1039
1040 msiof2: spi@e6c00000 {
1041 compatible = "renesas,msiof-r8a77965",
1042 "renesas,rcar-gen3-msiof";
1043 reg = <0 0xe6c00000 0 0x0064>;
1044 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1045 clocks = <&cpg CPG_MOD 209>;
1046 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1047 dma-names = "tx", "rx";
1048 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1049 resets = <&cpg 209>;
1050 #address-cells = <1>;
1051 #size-cells = <0>;
1052 status = "disabled";
1053 };
1054
1055 msiof3: spi@e6c10000 {
1056 compatible = "renesas,msiof-r8a77965",
1057 "renesas,rcar-gen3-msiof";
1058 reg = <0 0xe6c10000 0 0x0064>;
1059 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1060 clocks = <&cpg CPG_MOD 208>;
1061 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1062 dma-names = "tx", "rx";
1063 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1064 resets = <&cpg 208>;
1065 #address-cells = <1>;
1066 #size-cells = <0>;
1067 status = "disabled";
1068 };
1069
1070 vin0: video@e6ef0000 {
1071 compatible = "renesas,vin-r8a77965";
1072 reg = <0 0xe6ef0000 0 0x1000>;
1073 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1074 clocks = <&cpg CPG_MOD 811>;
1075 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1076 resets = <&cpg 811>;
1077 renesas,id = <0>;
1078 status = "disabled";
1079
1080 ports {
1081 #address-cells = <1>;
1082 #size-cells = <0>;
1083
1084 port@1 {
1085 #address-cells = <1>;
1086 #size-cells = <0>;
1087
1088 reg = <1>;
1089
1090 vin0csi20: endpoint@0 {
1091 reg = <0>;
1092 remote-endpoint= <&csi20vin0>;
1093 };
1094 vin0csi40: endpoint@2 {
1095 reg = <2>;
1096 remote-endpoint= <&csi40vin0>;
1097 };
1098 };
1099 };
1100 };
1101
1102 vin1: video@e6ef1000 {
1103 compatible = "renesas,vin-r8a77965";
1104 reg = <0 0xe6ef1000 0 0x1000>;
1105 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1106 clocks = <&cpg CPG_MOD 810>;
1107 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1108 resets = <&cpg 810>;
1109 renesas,id = <1>;
1110 status = "disabled";
1111
1112 ports {
1113 #address-cells = <1>;
1114 #size-cells = <0>;
1115
1116 port@1 {
1117 #address-cells = <1>;
1118 #size-cells = <0>;
1119
1120 reg = <1>;
1121
1122 vin1csi20: endpoint@0 {
1123 reg = <0>;
1124 remote-endpoint= <&csi20vin1>;
1125 };
1126 vin1csi40: endpoint@2 {
1127 reg = <2>;
1128 remote-endpoint= <&csi40vin1>;
1129 };
1130 };
1131 };
1132 };
1133
1134 vin2: video@e6ef2000 {
1135 compatible = "renesas,vin-r8a77965";
1136 reg = <0 0xe6ef2000 0 0x1000>;
1137 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1138 clocks = <&cpg CPG_MOD 809>;
1139 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1140 resets = <&cpg 809>;
1141 renesas,id = <2>;
1142 status = "disabled";
1143
1144 ports {
1145 #address-cells = <1>;
1146 #size-cells = <0>;
1147
1148 port@1 {
1149 #address-cells = <1>;
1150 #size-cells = <0>;
1151
1152 reg = <1>;
1153
1154 vin2csi20: endpoint@0 {
1155 reg = <0>;
1156 remote-endpoint= <&csi20vin2>;
1157 };
1158 vin2csi40: endpoint@2 {
1159 reg = <2>;
1160 remote-endpoint= <&csi40vin2>;
1161 };
1162 };
1163 };
1164 };
1165
1166 vin3: video@e6ef3000 {
1167 compatible = "renesas,vin-r8a77965";
1168 reg = <0 0xe6ef3000 0 0x1000>;
1169 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1170 clocks = <&cpg CPG_MOD 808>;
1171 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1172 resets = <&cpg 808>;
1173 renesas,id = <3>;
1174 status = "disabled";
1175
1176 ports {
1177 #address-cells = <1>;
1178 #size-cells = <0>;
1179
1180 port@1 {
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1183
1184 reg = <1>;
1185
1186 vin3csi20: endpoint@0 {
1187 reg = <0>;
1188 remote-endpoint= <&csi20vin3>;
1189 };
1190 vin3csi40: endpoint@2 {
1191 reg = <2>;
1192 remote-endpoint= <&csi40vin3>;
1193 };
1194 };
1195 };
1196 };
1197
1198 vin4: video@e6ef4000 {
1199 compatible = "renesas,vin-r8a77965";
1200 reg = <0 0xe6ef4000 0 0x1000>;
1201 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1202 clocks = <&cpg CPG_MOD 807>;
1203 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1204 resets = <&cpg 807>;
1205 renesas,id = <4>;
1206 status = "disabled";
1207
1208 ports {
1209 #address-cells = <1>;
1210 #size-cells = <0>;
1211
1212 port@1 {
1213 #address-cells = <1>;
1214 #size-cells = <0>;
1215
1216 reg = <1>;
1217
1218 vin4csi20: endpoint@0 {
1219 reg = <0>;
1220 remote-endpoint= <&csi20vin4>;
1221 };
1222 vin4csi40: endpoint@2 {
1223 reg = <2>;
1224 remote-endpoint= <&csi40vin4>;
1225 };
1226 };
1227 };
1228 };
1229
1230 vin5: video@e6ef5000 {
1231 compatible = "renesas,vin-r8a77965";
1232 reg = <0 0xe6ef5000 0 0x1000>;
1233 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1234 clocks = <&cpg CPG_MOD 806>;
1235 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1236 resets = <&cpg 806>;
1237 renesas,id = <5>;
1238 status = "disabled";
1239
1240 ports {
1241 #address-cells = <1>;
1242 #size-cells = <0>;
1243
1244 port@1 {
1245 #address-cells = <1>;
1246 #size-cells = <0>;
1247
1248 reg = <1>;
1249
1250 vin5csi20: endpoint@0 {
1251 reg = <0>;
1252 remote-endpoint= <&csi20vin5>;
1253 };
1254 vin5csi40: endpoint@2 {
1255 reg = <2>;
1256 remote-endpoint= <&csi40vin5>;
1257 };
1258 };
1259 };
1260 };
1261
1262 vin6: video@e6ef6000 {
1263 compatible = "renesas,vin-r8a77965";
1264 reg = <0 0xe6ef6000 0 0x1000>;
1265 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1266 clocks = <&cpg CPG_MOD 805>;
1267 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1268 resets = <&cpg 805>;
1269 renesas,id = <6>;
1270 status = "disabled";
1271
1272 ports {
1273 #address-cells = <1>;
1274 #size-cells = <0>;
1275
1276 port@1 {
1277 #address-cells = <1>;
1278 #size-cells = <0>;
1279
1280 reg = <1>;
1281
1282 vin6csi20: endpoint@0 {
1283 reg = <0>;
1284 remote-endpoint= <&csi20vin6>;
1285 };
1286 vin6csi40: endpoint@2 {
1287 reg = <2>;
1288 remote-endpoint= <&csi40vin6>;
1289 };
1290 };
1291 };
1292 };
1293
1294 vin7: video@e6ef7000 {
1295 compatible = "renesas,vin-r8a77965";
1296 reg = <0 0xe6ef7000 0 0x1000>;
1297 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1298 clocks = <&cpg CPG_MOD 804>;
1299 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1300 resets = <&cpg 804>;
1301 renesas,id = <7>;
1302 status = "disabled";
1303
1304 ports {
1305 #address-cells = <1>;
1306 #size-cells = <0>;
1307
1308 port@1 {
1309 #address-cells = <1>;
1310 #size-cells = <0>;
1311
1312 reg = <1>;
1313
1314 vin7csi20: endpoint@0 {
1315 reg = <0>;
1316 remote-endpoint= <&csi20vin7>;
1317 };
1318 vin7csi40: endpoint@2 {
1319 reg = <2>;
1320 remote-endpoint= <&csi40vin7>;
1321 };
1322 };
1323 };
1324 };
1325
1326 rcar_sound: sound@ec500000 {
1327 reg = <0 0xec500000 0 0x1000>, /* SCU */
1328 <0 0xec5a0000 0 0x100>, /* ADG */
1329 <0 0xec540000 0 0x1000>, /* SSIU */
1330 <0 0xec541000 0 0x280>, /* SSI */
1331 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1332 /* placeholder */
1333
1334 rcar_sound,dvc {
1335 dvc0: dvc-0 {
1336 };
1337 dvc1: dvc-1 {
1338 };
1339 };
1340
1341 rcar_sound,src {
1342 src0: src-0 {
1343 };
1344 src1: src-1 {
1345 };
1346 };
1347
1348 rcar_sound,ssi {
1349 ssi0: ssi-0 {
1350 };
1351 ssi1: ssi-1 {
1352 };
1353 };
1354
1355 ports {
1356 #address-cells = <1>;
1357 #size-cells = <0>;
1358 port@0 {
1359 reg = <0>;
1360 };
1361 port@1 {
1362 reg = <1>;
1363 };
1364 };
1365 };
1366
1367 xhci0: usb@ee000000 {
1368 compatible = "renesas,xhci-r8a77965",
1369 "renesas,rcar-gen3-xhci";
1370 reg = <0 0xee000000 0 0xc00>;
1371 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1372 clocks = <&cpg CPG_MOD 328>;
1373 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1374 resets = <&cpg 328>;
1375 status = "disabled";
1376 };
1377
1378 usb3_peri0: usb@ee020000 {
1379 compatible = "renesas,r8a77965-usb3-peri",
1380 "renesas,rcar-gen3-usb3-peri";
1381 reg = <0 0xee020000 0 0x400>;
1382 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1383 clocks = <&cpg CPG_MOD 328>;
1384 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1385 resets = <&cpg 328>;
1386 status = "disabled";
1387 };
1388
1389 ohci0: usb@ee080000 {
1390 compatible = "generic-ohci";
1391 reg = <0 0xee080000 0 0x100>;
1392 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1393 clocks = <&cpg CPG_MOD 703>;
1394 phys = <&usb2_phy0>;
1395 phy-names = "usb";
1396 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1397 resets = <&cpg 703>;
1398 status = "disabled";
1399 };
1400
1401 ohci1: usb@ee0a0000 {
1402 compatible = "generic-ohci";
1403 reg = <0 0xee0a0000 0 0x100>;
1404 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1405 clocks = <&cpg CPG_MOD 702>;
1406 phys = <&usb2_phy1>;
1407 phy-names = "usb";
1408 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1409 resets = <&cpg 702>;
1410 status = "disabled";
1411 };
1412
1413 ehci0: usb@ee080100 {
1414 compatible = "generic-ehci";
1415 reg = <0 0xee080100 0 0x100>;
1416 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1417 clocks = <&cpg CPG_MOD 703>;
1418 phys = <&usb2_phy0>;
1419 phy-names = "usb";
1420 companion = <&ohci0>;
1421 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1422 resets = <&cpg 703>;
1423 status = "disabled";
1424 };
1425
1426 ehci1: usb@ee0a0100 {
1427 compatible = "generic-ehci";
1428 reg = <0 0xee0a0100 0 0x100>;
1429 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1430 clocks = <&cpg CPG_MOD 702>;
1431 phys = <&usb2_phy1>;
1432 phy-names = "usb";
1433 companion = <&ohci1>;
1434 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1435 resets = <&cpg 702>;
1436 status = "disabled";
1437 };
1438
1439 usb2_phy0: usb-phy@ee080200 {
1440 compatible = "renesas,usb2-phy-r8a77965",
1441 "renesas,rcar-gen3-usb2-phy";
1442 reg = <0 0xee080200 0 0x700>;
1443 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1444 clocks = <&cpg CPG_MOD 703>;
1445 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1446 resets = <&cpg 703>;
1447 #phy-cells = <0>;
1448 status = "disabled";
1449 };
1450
1451 usb2_phy1: usb-phy@ee0a0200 {
1452 compatible = "renesas,usb2-phy-r8a77965",
1453 "renesas,rcar-gen3-usb2-phy";
1454 reg = <0 0xee0a0200 0 0x700>;
1455 clocks = <&cpg CPG_MOD 703>;
1456 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1457 resets = <&cpg 703>;
1458 #phy-cells = <0>;
1459 status = "disabled";
1460 };
1461
1462 sdhi0: sd@ee100000 {
1463 compatible = "renesas,sdhi-r8a77965",
1464 "renesas,rcar-gen3-sdhi";
1465 reg = <0 0xee100000 0 0x2000>;
1466 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1467 clocks = <&cpg CPG_MOD 314>;
1468 max-frequency = <200000000>;
1469 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1470 resets = <&cpg 314>;
1471 status = "disabled";
1472 };
1473
1474 sdhi1: sd@ee120000 {
1475 compatible = "renesas,sdhi-r8a77965",
1476 "renesas,rcar-gen3-sdhi";
1477 reg = <0 0xee120000 0 0x2000>;
1478 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1479 clocks = <&cpg CPG_MOD 313>;
1480 max-frequency = <200000000>;
1481 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1482 resets = <&cpg 313>;
1483 status = "disabled";
1484 };
1485
1486 sdhi2: sd@ee140000 {
1487 compatible = "renesas,sdhi-r8a77965",
1488 "renesas,rcar-gen3-sdhi";
1489 reg = <0 0xee140000 0 0x2000>;
1490 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1491 clocks = <&cpg CPG_MOD 312>;
1492 max-frequency = <200000000>;
1493 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1494 resets = <&cpg 312>;
1495 status = "disabled";
1496 };
1497
1498 sdhi3: sd@ee160000 {
1499 compatible = "renesas,sdhi-r8a77965",
1500 "renesas,rcar-gen3-sdhi";
1501 reg = <0 0xee160000 0 0x2000>;
1502 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1503 clocks = <&cpg CPG_MOD 311>;
1504 max-frequency = <200000000>;
1505 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1506 resets = <&cpg 311>;
1507 status = "disabled";
1508 };
1509
1510 gic: interrupt-controller@f1010000 {
1511 compatible = "arm,gic-400";
1512 #interrupt-cells = <3>;
1513 #address-cells = <0>;
1514 interrupt-controller;
1515 reg = <0x0 0xf1010000 0 0x1000>,
1516 <0x0 0xf1020000 0 0x20000>,
1517 <0x0 0xf1040000 0 0x20000>,
1518 <0x0 0xf1060000 0 0x20000>;
1519 interrupts = <GIC_PPI 9
1520 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1521 clocks = <&cpg CPG_MOD 408>;
1522 clock-names = "clk";
1523 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1524 resets = <&cpg 408>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001525 };
1526
Marek Vasutab9fbe92018-12-03 21:43:05 +01001527 pciec0: pcie@fe000000 {
1528 compatible = "renesas,pcie-r8a77965",
1529 "renesas,pcie-rcar-gen3";
1530 reg = <0 0xfe000000 0 0x80000>;
1531 #address-cells = <3>;
1532 #size-cells = <2>;
1533 bus-range = <0x00 0xff>;
1534 device_type = "pci";
1535 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1536 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1537 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1538 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1539 /* Map all possible DDR as inbound ranges */
1540 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1541 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1542 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1543 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1544 #interrupt-cells = <1>;
1545 interrupt-map-mask = <0 0 0 0>;
1546 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1547 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1548 clock-names = "pcie", "pcie_bus";
1549 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1550 resets = <&cpg 319>;
1551 status = "disabled";
Marek Vasuta8c01e02018-02-26 10:35:15 +01001552 };
1553
Marek Vasutab9fbe92018-12-03 21:43:05 +01001554 pciec1: pcie@ee800000 {
1555 compatible = "renesas,pcie-r8a77965",
1556 "renesas,pcie-rcar-gen3";
1557 reg = <0 0xee800000 0 0x80000>;
1558 #address-cells = <3>;
1559 #size-cells = <2>;
1560 bus-range = <0x00 0xff>;
1561 device_type = "pci";
1562 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1563 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1564 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1565 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1566 /* Map all possible DDR as inbound ranges */
1567 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1568 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1569 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1570 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1571 #interrupt-cells = <1>;
1572 interrupt-map-mask = <0 0 0 0>;
1573 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1574 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1575 clock-names = "pcie", "pcie_bus";
1576 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1577 resets = <&cpg 318>;
1578 status = "disabled";
Marek Vasuta8c01e02018-02-26 10:35:15 +01001579 };
1580
Marek Vasutab9fbe92018-12-03 21:43:05 +01001581 fcpf0: fcp@fe950000 {
1582 compatible = "renesas,fcpf";
1583 reg = <0 0xfe950000 0 0x200>;
1584 clocks = <&cpg CPG_MOD 615>;
1585 power-domains = <&sysc R8A77965_PD_A3VP>;
1586 resets = <&cpg 615>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001587 };
1588
Marek Vasutab9fbe92018-12-03 21:43:05 +01001589 vspb: vsp@fe960000 {
1590 compatible = "renesas,vsp2";
1591 reg = <0 0xfe960000 0 0x8000>;
1592 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1593 clocks = <&cpg CPG_MOD 626>;
1594 power-domains = <&sysc R8A77965_PD_A3VP>;
1595 resets = <&cpg 626>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001596
Marek Vasutab9fbe92018-12-03 21:43:05 +01001597 renesas,fcp = <&fcpvb0>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001598 };
1599
Marek Vasutab9fbe92018-12-03 21:43:05 +01001600 fcpvb0: fcp@fe96f000 {
1601 compatible = "renesas,fcpv";
1602 reg = <0 0xfe96f000 0 0x200>;
1603 clocks = <&cpg CPG_MOD 607>;
1604 power-domains = <&sysc R8A77965_PD_A3VP>;
1605 resets = <&cpg 607>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001606 };
1607
Marek Vasutab9fbe92018-12-03 21:43:05 +01001608 vspi0: vsp@fe9a0000 {
1609 compatible = "renesas,vsp2";
1610 reg = <0 0xfe9a0000 0 0x8000>;
1611 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1612 clocks = <&cpg CPG_MOD 631>;
1613 power-domains = <&sysc R8A77965_PD_A3VP>;
1614 resets = <&cpg 631>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001615
Marek Vasutab9fbe92018-12-03 21:43:05 +01001616 renesas,fcp = <&fcpvi0>;
Marek Vasutb2e2fe32018-12-03 20:34:13 +01001617 };
1618
Marek Vasutab9fbe92018-12-03 21:43:05 +01001619 fcpvi0: fcp@fe9af000 {
1620 compatible = "renesas,fcpv";
1621 reg = <0 0xfe9af000 0 0x200>;
1622 clocks = <&cpg CPG_MOD 611>;
1623 power-domains = <&sysc R8A77965_PD_A3VP>;
1624 resets = <&cpg 611>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001625 };
1626
Marek Vasutab9fbe92018-12-03 21:43:05 +01001627 vspd0: vsp@fea20000 {
1628 compatible = "renesas,vsp2";
1629 reg = <0 0xfea20000 0 0x5000>;
1630 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1631 clocks = <&cpg CPG_MOD 623>;
1632 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1633 resets = <&cpg 623>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001634
Marek Vasutab9fbe92018-12-03 21:43:05 +01001635 renesas,fcp = <&fcpvd0>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001636 };
1637
Marek Vasutab9fbe92018-12-03 21:43:05 +01001638 fcpvd0: fcp@fea27000 {
1639 compatible = "renesas,fcpv";
1640 reg = <0 0xfea27000 0 0x200>;
1641 clocks = <&cpg CPG_MOD 603>;
1642 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1643 resets = <&cpg 603>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001644 };
1645
Marek Vasutab9fbe92018-12-03 21:43:05 +01001646 vspd1: vsp@fea28000 {
1647 compatible = "renesas,vsp2";
1648 reg = <0 0xfea28000 0 0x5000>;
1649 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1650 clocks = <&cpg CPG_MOD 622>;
1651 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1652 resets = <&cpg 622>;
Marek Vasut051a5262018-06-06 20:03:30 +02001653
Marek Vasutab9fbe92018-12-03 21:43:05 +01001654 renesas,fcp = <&fcpvd1>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001655 };
1656
Marek Vasutab9fbe92018-12-03 21:43:05 +01001657 fcpvd1: fcp@fea2f000 {
1658 compatible = "renesas,fcpv";
1659 reg = <0 0xfea2f000 0 0x200>;
1660 clocks = <&cpg CPG_MOD 602>;
1661 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1662 resets = <&cpg 602>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001663 };
1664
Marek Vasutab9fbe92018-12-03 21:43:05 +01001665 csi20: csi2@fea80000 {
1666 compatible = "renesas,r8a77965-csi2";
1667 reg = <0 0xfea80000 0 0x10000>;
1668 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1669 clocks = <&cpg CPG_MOD 714>;
1670 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1671 resets = <&cpg 714>;
1672 status = "disabled";
Marek Vasut051a5262018-06-06 20:03:30 +02001673
Marek Vasutab9fbe92018-12-03 21:43:05 +01001674 ports {
1675 #address-cells = <1>;
1676 #size-cells = <0>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001677
Marek Vasutab9fbe92018-12-03 21:43:05 +01001678 port@1 {
1679 #address-cells = <1>;
1680 #size-cells = <0>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001681
Marek Vasutab9fbe92018-12-03 21:43:05 +01001682 reg = <1>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001683
Marek Vasutab9fbe92018-12-03 21:43:05 +01001684 csi20vin0: endpoint@0 {
1685 reg = <0>;
1686 remote-endpoint = <&vin0csi20>;
1687 };
1688 csi20vin1: endpoint@1 {
1689 reg = <1>;
1690 remote-endpoint = <&vin1csi20>;
1691 };
1692 csi20vin2: endpoint@2 {
1693 reg = <2>;
1694 remote-endpoint = <&vin2csi20>;
1695 };
1696 csi20vin3: endpoint@3 {
1697 reg = <3>;
1698 remote-endpoint = <&vin3csi20>;
1699 };
1700 csi20vin4: endpoint@4 {
1701 reg = <4>;
1702 remote-endpoint = <&vin4csi20>;
1703 };
1704 csi20vin5: endpoint@5 {
1705 reg = <5>;
1706 remote-endpoint = <&vin5csi20>;
1707 };
1708 csi20vin6: endpoint@6 {
1709 reg = <6>;
1710 remote-endpoint = <&vin6csi20>;
1711 };
1712 csi20vin7: endpoint@7 {
1713 reg = <7>;
1714 remote-endpoint = <&vin7csi20>;
1715 };
1716 };
1717 };
Marek Vasuta8c01e02018-02-26 10:35:15 +01001718 };
1719
Marek Vasutab9fbe92018-12-03 21:43:05 +01001720 csi40: csi2@feaa0000 {
1721 compatible = "renesas,r8a77965-csi2";
1722 reg = <0 0xfeaa0000 0 0x10000>;
1723 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1724 clocks = <&cpg CPG_MOD 716>;
1725 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1726 resets = <&cpg 716>;
1727 status = "disabled";
Marek Vasuta8c01e02018-02-26 10:35:15 +01001728
Marek Vasutab9fbe92018-12-03 21:43:05 +01001729 ports {
1730 #address-cells = <1>;
1731 #size-cells = <0>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001732
Marek Vasutab9fbe92018-12-03 21:43:05 +01001733 port@1 {
1734 #address-cells = <1>;
1735 #size-cells = <0>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001736
Marek Vasutab9fbe92018-12-03 21:43:05 +01001737 reg = <1>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001738
Marek Vasutab9fbe92018-12-03 21:43:05 +01001739 csi40vin0: endpoint@0 {
1740 reg = <0>;
1741 remote-endpoint = <&vin0csi40>;
1742 };
1743 csi40vin1: endpoint@1 {
1744 reg = <1>;
1745 remote-endpoint = <&vin1csi40>;
1746 };
1747 csi40vin2: endpoint@2 {
1748 reg = <2>;
1749 remote-endpoint = <&vin2csi40>;
1750 };
1751 csi40vin3: endpoint@3 {
1752 reg = <3>;
1753 remote-endpoint = <&vin3csi40>;
1754 };
1755 csi40vin4: endpoint@4 {
1756 reg = <4>;
1757 remote-endpoint = <&vin4csi40>;
1758 };
1759 csi40vin5: endpoint@5 {
1760 reg = <5>;
1761 remote-endpoint = <&vin5csi40>;
1762 };
1763 csi40vin6: endpoint@6 {
1764 reg = <6>;
1765 remote-endpoint = <&vin6csi40>;
1766 };
1767 csi40vin7: endpoint@7 {
1768 reg = <7>;
1769 remote-endpoint = <&vin7csi40>;
1770 };
1771 };
1772 };
Marek Vasuta8c01e02018-02-26 10:35:15 +01001773 };
1774
Marek Vasutab9fbe92018-12-03 21:43:05 +01001775 hdmi0: hdmi@fead0000 {
1776 compatible = "renesas,r8a77965-hdmi",
1777 "renesas,rcar-gen3-hdmi";
1778 reg = <0 0xfead0000 0 0x10000>;
1779 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
1780 clocks = <&cpg CPG_MOD 729>,
1781 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
1782 clock-names = "iahb", "isfr";
1783 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1784 resets = <&cpg 729>;
1785 status = "disabled";
Marek Vasuta8c01e02018-02-26 10:35:15 +01001786
Marek Vasutab9fbe92018-12-03 21:43:05 +01001787 ports {
1788 #address-cells = <1>;
1789 #size-cells = <0>;
1790 port@0 {
1791 reg = <0>;
1792 dw_hdmi0_in: endpoint {
1793 remote-endpoint = <&du_out_hdmi0>;
1794 };
1795 };
1796 port@1 {
1797 reg = <1>;
1798 };
1799 };
Marek Vasuta8c01e02018-02-26 10:35:15 +01001800 };
1801
1802 du: display@feb00000 {
Marek Vasutab9fbe92018-12-03 21:43:05 +01001803 compatible = "renesas,du-r8a77965";
1804 reg = <0 0xfeb00000 0 0x80000>;
1805 reg-names = "du";
1806 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1807 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1808 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1809 clocks = <&cpg CPG_MOD 724>,
1810 <&cpg CPG_MOD 723>,
1811 <&cpg CPG_MOD 721>;
1812 clock-names = "du.0", "du.1", "du.3";
1813 status = "disabled";
1814
1815 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001816
1817 ports {
Marek Vasut051a5262018-06-06 20:03:30 +02001818 #address-cells = <1>;
1819 #size-cells = <0>;
1820
Marek Vasuta8c01e02018-02-26 10:35:15 +01001821 port@0 {
1822 reg = <0>;
1823 du_out_rgb: endpoint {
1824 };
1825 };
1826 port@1 {
1827 reg = <1>;
1828 du_out_hdmi0: endpoint {
Marek Vasutab9fbe92018-12-03 21:43:05 +01001829 remote-endpoint = <&dw_hdmi0_in>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001830 };
1831 };
1832 port@2 {
1833 reg = <2>;
1834 du_out_lvds0: endpoint {
1835 };
1836 };
1837 };
1838 };
1839
Marek Vasutab9fbe92018-12-03 21:43:05 +01001840 prr: chipid@fff00044 {
1841 compatible = "renesas,prr";
1842 reg = <0 0xfff00044 0 4>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001843 };
Marek Vasutab9fbe92018-12-03 21:43:05 +01001844 };
Marek Vasuta8c01e02018-02-26 10:35:15 +01001845
Marek Vasutab9fbe92018-12-03 21:43:05 +01001846 timer {
1847 compatible = "arm,armv8-timer";
1848 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1849 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1850 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1851 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1852 };
Marek Vasuta8c01e02018-02-26 10:35:15 +01001853
Marek Vasutab9fbe92018-12-03 21:43:05 +01001854 thermal-zones {
1855 sensor_thermal1: sensor-thermal1 {
1856 polling-delay-passive = <250>;
1857 polling-delay = <1000>;
1858 thermal-sensors = <&tsc 0>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001859
Marek Vasutab9fbe92018-12-03 21:43:05 +01001860 trips {
1861 sensor1_crit: sensor1-crit {
1862 temperature = <120000>;
1863 hysteresis = <1000>;
1864 type = "critical";
Marek Vasuta8c01e02018-02-26 10:35:15 +01001865 };
1866 };
Marek Vasutab9fbe92018-12-03 21:43:05 +01001867 };
Marek Vasuta8c01e02018-02-26 10:35:15 +01001868
Marek Vasutab9fbe92018-12-03 21:43:05 +01001869 sensor_thermal2: sensor-thermal2 {
1870 polling-delay-passive = <250>;
1871 polling-delay = <1000>;
1872 thermal-sensors = <&tsc 1>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001873
Marek Vasutab9fbe92018-12-03 21:43:05 +01001874 trips {
1875 sensor2_crit: sensor2-crit {
1876 temperature = <120000>;
1877 hysteresis = <1000>;
1878 type = "critical";
Marek Vasuta8c01e02018-02-26 10:35:15 +01001879 };
1880 };
1881 };
1882
Marek Vasutab9fbe92018-12-03 21:43:05 +01001883 sensor_thermal3: sensor-thermal3 {
1884 polling-delay-passive = <250>;
1885 polling-delay = <1000>;
1886 thermal-sensors = <&tsc 2>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001887
Marek Vasutab9fbe92018-12-03 21:43:05 +01001888 trips {
1889 sensor3_crit: sensor3-crit {
1890 temperature = <120000>;
1891 hysteresis = <1000>;
1892 type = "critical";
1893 };
1894 };
Marek Vasuta8c01e02018-02-26 10:35:15 +01001895 };
Marek Vasutab9fbe92018-12-03 21:43:05 +01001896 };
Marek Vasuta8c01e02018-02-26 10:35:15 +01001897
Marek Vasutab9fbe92018-12-03 21:43:05 +01001898 /* External USB clocks - can be overridden by the board */
1899 usb3s0_clk: usb3s0 {
1900 compatible = "fixed-clock";
1901 #clock-cells = <0>;
1902 clock-frequency = <0>;
1903 };
Marek Vasuta8c01e02018-02-26 10:35:15 +01001904
Marek Vasutab9fbe92018-12-03 21:43:05 +01001905 usb_extal_clk: usb_extal {
1906 compatible = "fixed-clock";
1907 #clock-cells = <0>;
1908 clock-frequency = <0>;
Marek Vasuta8c01e02018-02-26 10:35:15 +01001909 };
1910};