blob: 2e1dba6a48d6eba0e311cd9da5d8857e9806430d [file] [log] [blame]
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09001/*
2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09007 */
8
9#include <common.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000010#include <spi.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000011#include <lcd.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090012#include <asm/io.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000013#include <asm/gpio.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090014#include <asm/arch/adc.h>
15#include <asm/arch/gpio.h>
16#include <asm/arch/mmc.h>
Piotr Wilczek3b179142012-09-20 00:19:59 +000017#include <asm/arch/pinmux.h>
Piotr Wilczek6ce94c32012-09-20 00:20:00 +000018#include <asm/arch/watchdog.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000019#include <libtizen.h>
20#include <ld9040.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000021#include <power/pmic.h>
Lukasz Majewskibf731262011-12-15 10:32:12 +010022#include <usb/s3c_udc.h>
23#include <asm/arch/cpu.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000024#include <power/max8998_pmic.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090025
26DECLARE_GLOBAL_DATA_PTR;
27
Chander Kashyap4131a772011-12-06 23:34:12 +000028struct exynos4_gpio_part1 *gpio1;
29struct exynos4_gpio_part2 *gpio2;
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090030unsigned int board_rev;
31
32u32 get_board_rev(void)
33{
34 return board_rev;
35}
36
37static int get_hwrev(void)
38{
39 return board_rev & 0xFF;
40}
41
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +000042static void init_pmic_lcd(void);
43
Łukasz Majewski11be2832012-11-13 03:22:17 +000044int power_init_board(void)
45{
46 int ret;
47
48 ret = pmic_init(I2C_5);
49 if (ret)
50 return ret;
51
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +000052 init_pmic_lcd();
53
Łukasz Majewski11be2832012-11-13 03:22:17 +000054 return 0;
55}
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090056
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090057int dram_init(void)
58{
59 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
60 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
61
62 return 0;
63}
64
65void dram_init_banksize(void)
66{
67 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
68 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
69 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
70 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
71}
72
73static unsigned short get_adc_value(int channel)
74{
75 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
76 unsigned short ret = 0;
77 unsigned int reg;
78 unsigned int loop = 0;
79
80 writel(channel & 0xF, &adc->adcmux);
81 writel((1 << 14) | (49 << 6), &adc->adccon);
82 writel(1000 & 0xffff, &adc->adcdly);
83 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
84 udelay(10);
85 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
86 udelay(10);
87
88 do {
89 udelay(1);
90 reg = readl(&adc->adccon);
91 } while (!(reg & (1 << 15)) && (loop++ < 1000));
92
93 ret = readl(&adc->adcdat0) & 0xFFF;
94
95 return ret;
96}
97
Łukasz Majewski61f8b402012-03-26 21:53:48 +000098static int adc_power_control(int on)
99{
100 int ret;
Łukasz Majewski1c6dba12012-11-13 03:21:55 +0000101 struct pmic *p = pmic_get("MAX8998_PMIC");
102 if (!p)
103 return -ENODEV;
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000104
105 if (pmic_probe(p))
106 return -1;
107
108 ret = pmic_set_output(p,
109 MAX8998_REG_ONOFF1,
110 MAX8998_LDO4, !!on);
111
112 return ret;
113}
114
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900115static unsigned int get_hw_revision(void)
116{
117 int hwrev, mode0, mode1;
118
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000119 adc_power_control(1);
120
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900121 mode0 = get_adc_value(1); /* HWREV_MODE0 */
122 mode1 = get_adc_value(2); /* HWREV_MODE1 */
123
124 /*
125 * XXX Always set the default hwrev as the latest board
126 * ADC = (voltage) / 3.3 * 4096
127 */
128 hwrev = 3;
129
130#define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
131 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
132 hwrev = 0x0; /* 0.01V 0.01V */
133 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
134 hwrev = 0x1; /* 610mV 0.01V */
135 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
136 hwrev = 0x2; /* 1.16V 0.01V */
137 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
138 hwrev = 0x3; /* 1.79V 0.01V */
139#undef IS_RANGE
140
141 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
142
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000143 adc_power_control(0);
144
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900145 return hwrev;
146}
147
148static void check_hw_revision(void)
149{
150 int hwrev;
151
152 hwrev = get_hw_revision();
153
154 board_rev |= hwrev;
155}
156
157#ifdef CONFIG_DISPLAY_BOARDINFO
158int checkboard(void)
159{
160 puts("Board:\tUniversal C210\n");
161 return 0;
162}
163#endif
164
165#ifdef CONFIG_GENERIC_MMC
166int board_mmc_init(bd_t *bis)
167{
Piotr Wilczek3b179142012-09-20 00:19:59 +0000168 int err;
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900169
170 switch (get_hwrev()) {
171 case 0:
172 /*
173 * Set the low to enable LDO_EN
174 * But when you use the test board for eMMC booting
175 * you should set it HIGH since it removes the inverter
176 */
177 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000178 s5p_gpio_direction_output(&gpio1->e3, 6, 0);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900179 break;
180 default:
181 /*
182 * Default reset state is High and there's no inverter
183 * But set it as HIGH to ensure
184 */
185 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000186 s5p_gpio_direction_output(&gpio1->e1, 3, 1);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900187 break;
188 }
189
190 /*
Piotr Wilczek3b179142012-09-20 00:19:59 +0000191 * MMC device init
192 * mmc0 : eMMC (8-bit buswidth)
193 * mmc2 : SD card (4-bit buswidth)
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900194 */
Piotr Wilczek3b179142012-09-20 00:19:59 +0000195 err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
196 if (err)
197 debug("SDMMC0 not configured\n");
198 else
199 err = s5p_mmc_init(0, 8);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900200
201 /* T-flash detect */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000202 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
203 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900204
205 /*
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900206 * Check the T-flash detect pin
207 * GPX3[4] T-flash detect pin
208 */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000209 if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
Piotr Wilczek3b179142012-09-20 00:19:59 +0000210 err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
211 if (err)
212 debug("SDMMC2 not configured\n");
213 else
214 err = s5p_mmc_init(2, 4);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900215 }
216
217 return err;
218
219}
220#endif
Lukasz Majewskibf731262011-12-15 10:32:12 +0100221
222#ifdef CONFIG_USB_GADGET
223static int s5pc210_phy_control(int on)
224{
Anatolij Gustschinba166612011-12-19 04:20:04 +0000225 int ret = 0;
Łukasz Majewski1c6dba12012-11-13 03:21:55 +0000226 struct pmic *p = pmic_get("MAX8998_PMIC");
227 if (!p)
228 return -ENODEV;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100229
230 if (pmic_probe(p))
231 return -1;
232
233 if (on) {
234 ret |= pmic_set_output(p,
235 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
236 MAX8998_SAFEOUT1, LDO_ON);
237 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
238 MAX8998_LDO3, LDO_ON);
239 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
240 MAX8998_LDO8, LDO_ON);
241
242 } else {
243 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
244 MAX8998_LDO8, LDO_OFF);
245 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
246 MAX8998_LDO3, LDO_OFF);
247 ret |= pmic_set_output(p,
248 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
249 MAX8998_SAFEOUT1, LDO_OFF);
250 }
251
252 if (ret) {
253 puts("MAX8998 LDO setting error!\n");
254 return -1;
255 }
256
257 return 0;
258}
259
260struct s3c_plat_otg_data s5pc210_otg_data = {
261 .phy_control = s5pc210_phy_control,
262 .regs_phy = EXYNOS4_USBPHY_BASE,
263 .regs_otg = EXYNOS4_USBOTG_BASE,
264 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
265 .usb_flags = PHY0_SLEEP,
266};
267#endif
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000268
269int board_early_init_f(void)
270{
271 wdt_stop();
272
273 return 0;
274}
Piotr Wilczeke372b552012-10-19 05:34:03 +0000275
276#ifdef CONFIG_SOFT_SPI
277static void soft_spi_init(void)
278{
279 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
280 CONFIG_SOFT_SPI_MODE & SPI_CPOL);
281 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
282 gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
283 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
284 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
285}
286
287void spi_cs_activate(struct spi_slave *slave)
288{
289 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
290 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
291 SPI_SCL(1);
292 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
293 CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
294}
295
296void spi_cs_deactivate(struct spi_slave *slave)
297{
298 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
299 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
300}
301
302int spi_cs_is_valid(unsigned int bus, unsigned int cs)
303{
304 return bus == 0 && cs == 0;
305}
306
307void universal_spi_scl(int bit)
308{
309 gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
310}
311
312void universal_spi_sda(int bit)
313{
314 gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
315}
316
317int universal_spi_read(void)
318{
319 return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
320}
321#endif
322
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000323static void init_pmic_lcd(void)
324{
325 unsigned char val;
326 int ret = 0;
327
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +0000328 struct pmic *p = pmic_get("MAX8998_PMIC");
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000329
Minkyu Kang538f26b2012-12-10 22:43:57 +0900330 if (!p)
331 return;
332
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000333 if (pmic_probe(p))
334 return;
335
336 /* LDO7 1.8V */
337 val = 0x02; /* (1800 - 1600) / 100; */
338 ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val);
339
340 /* LDO17 3.0V */
341 val = 0xe; /* (3000 - 1600) / 100; */
342 ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val);
343
344 /* Disable unneeded regulators */
345 /*
346 * ONOFF1
347 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
348 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
349 */
350 val = 0xB9;
351 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
352
353 /* ONOFF2
354 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
355 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
356 */
357 val = 0x50;
358 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
359
360 /* ONOFF3
361 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
362 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
363 */
364 val = 0x00;
365 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
366
367 if (ret)
368 puts("LCD pmic initialisation error!\n");
369}
370
Ajay Kumar41022a12013-02-21 23:52:57 +0000371void exynos_cfg_lcd_gpio(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000372{
373 unsigned int i, f3_end = 4;
374
375 for (i = 0; i < 8; i++) {
376 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
377 s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
378 s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
379 s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
380 /* pull-up/down disable */
381 s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
382 s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
383 s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
384
385 /* drive strength to max (24bit) */
386 s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
387 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
388 s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
389 s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
390 s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
391 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
392 }
393
394 for (i = 0; i < f3_end; i++) {
395 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
396 s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
397 /* pull-up/down disable */
398 s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
399 /* drive strength to max (24bit) */
400 s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
401 s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
402 }
403
404 /* gpio pad configuration for LCD reset. */
405 s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
406
407 spi_init();
408}
409
Ajay Kumar41022a12013-02-21 23:52:57 +0000410void exynos_reset_lcd(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000411{
412 s5p_gpio_set_value(&gpio2->y4, 5, 1);
413 udelay(10000);
414 s5p_gpio_set_value(&gpio2->y4, 5, 0);
415 udelay(10000);
416 s5p_gpio_set_value(&gpio2->y4, 5, 1);
417 udelay(100);
418}
419
Ajay Kumar41022a12013-02-21 23:52:57 +0000420void exynos_lcd_power_on(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000421{
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +0000422 struct pmic *p = pmic_get("MAX8998_PMIC");
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000423
Minkyu Kang538f26b2012-12-10 22:43:57 +0900424 if (!p)
425 return;
426
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000427 if (pmic_probe(p))
428 return;
429
430 pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
431 pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
432}
433
434vidinfo_t panel_info = {
435 .vl_freq = 60,
436 .vl_col = 480,
437 .vl_row = 800,
438 .vl_width = 480,
439 .vl_height = 800,
440 .vl_clkp = CONFIG_SYS_HIGH,
441 .vl_hsp = CONFIG_SYS_HIGH,
442 .vl_vsp = CONFIG_SYS_HIGH,
443 .vl_dp = CONFIG_SYS_HIGH,
444
445 .vl_bpix = 5, /* Bits per pixel */
446
447 /* LD9040 LCD Panel */
448 .vl_hspw = 2,
449 .vl_hbpd = 16,
450 .vl_hfpd = 16,
451
452 .vl_vspw = 2,
453 .vl_vbpd = 8,
454 .vl_vfpd = 8,
455 .vl_cmd_allow_len = 0xf,
456
457 .win_id = 0,
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000458 .dual_lcd_enabled = 0,
459
460 .init_delay = 0,
461 .power_on_delay = 10000,
462 .reset_delay = 10000,
463 .interface_mode = FIMD_RGB_INTERFACE,
464 .mipi_enabled = 0,
465};
466
Ajay Kumar41022a12013-02-21 23:52:57 +0000467void exynos_cfg_ldo(void)
468{
469 ld9040_cfg_ldo();
470}
471
472void exynos_enable_ldo(unsigned int onoff)
473{
474 ld9040_enable_ldo(onoff);
475}
476
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000477void init_panel_info(vidinfo_t *vid)
478{
479 vid->logo_on = 1;
480 vid->resolution = HD_RESOLUTION;
481 vid->rgb_mode = MODE_RGB_P;
482
483#ifdef CONFIG_TIZEN
484 get_tizen_logo_info(vid);
485#endif
486
487 /* for LD9040. */
488 vid->pclk_name = 1; /* MPLL */
489 vid->sclk_div = 1;
490
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000491 setenv("lcdinfo", "lcd=ld9040");
492}
493
Piotr Wilczeke372b552012-10-19 05:34:03 +0000494int board_init(void)
495{
496 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
497 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
498
499 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
500 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
501
Piotr Wilczeke372b552012-10-19 05:34:03 +0000502#ifdef CONFIG_SOFT_SPI
503 soft_spi_init();
504#endif
505 check_hw_revision();
506 printf("HW Revision:\t0x%x\n", board_rev);
507
508 return 0;
509}