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wdenke65527f2004-02-12 00:47:09 +00001/*
2 * Configuation settings for the Motorola MC5272C3 board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
wdenke65527f2004-02-12 00:47:09 +00007 */
wdenkabf7a7c2003-12-08 01:34:36 +00008
wdenke65527f2004-02-12 00:47:09 +00009/*
10 * board/config.h - configuration options, board specific
11 */
wdenkabf7a7c2003-12-08 01:34:36 +000012
wdenke65527f2004-02-12 00:47:09 +000013#ifndef _M5272C3_H
14#define _M5272C3_H
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 */
TsiChungLiew1692b482007-08-15 20:32:06 -050020#define CONFIG_MCFTMR
wdenkabf7a7c2003-12-08 01:34:36 +000021
TsiChungLiew1692b482007-08-15 20:32:06 -050022#define CONFIG_MCFUART
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020023#define CONFIG_SYS_UART_PORT (0)
TsiChung Liewbd05c6d2008-08-15 16:50:07 +000024#define CONFIG_BAUDRATE 115200
wdenke65527f2004-02-12 00:47:09 +000025
TsiChungLiew1692b482007-08-15 20:32:06 -050026#undef CONFIG_WATCHDOG
wdenke65527f2004-02-12 00:47:09 +000027#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
28
TsiChungLiew1692b482007-08-15 20:32:06 -050029#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
wdenke65527f2004-02-12 00:47:09 +000030
31/* Configuration for environment
32 * Environment is embedded in u-boot in the second sector of the flash
33 */
34#ifndef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020035#define CONFIG_ENV_OFFSET 0x4000
36#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +020037#define CONFIG_ENV_IS_IN_FLASH 1
wdenke65527f2004-02-12 00:47:09 +000038#else
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020039#define CONFIG_ENV_ADDR 0xffe04000
40#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +020041#define CONFIG_ENV_IS_IN_FLASH 1
wdenke65527f2004-02-12 00:47:09 +000042#endif
43
Jon Loeliger446e1f52007-07-08 14:14:17 -050044/*
Jon Loeligered26c742007-07-10 09:10:49 -050045 * BOOTP options
46 */
47#define CONFIG_BOOTP_BOOTFILESIZE
48#define CONFIG_BOOTP_BOOTPATH
49#define CONFIG_BOOTP_GATEWAY
50#define CONFIG_BOOTP_HOSTNAME
51
Jon Loeligered26c742007-07-10 09:10:49 -050052/*
Jon Loeliger446e1f52007-07-08 14:14:17 -050053 * Command line configuration.
54 */
55#include <config_cmd_default.h>
56
TsiChung Liew0ee47d42010-03-11 22:12:53 -060057#define CONFIG_CMD_CACHE
Jon Loeliger446e1f52007-07-08 14:14:17 -050058#define CONFIG_CMD_MII
TsiChungLiew1692b482007-08-15 20:32:06 -050059#define CONFIG_CMD_NET
60#define CONFIG_CMD_PING
61#define CONFIG_CMD_MISC
62#define CONFIG_CMD_ELF
63#define CONFIG_CMD_FLASH
64#define CONFIG_CMD_MEMORY
Jon Loeliger446e1f52007-07-08 14:14:17 -050065
66#undef CONFIG_CMD_LOADS
67#undef CONFIG_CMD_LOADB
68
wdenke65527f2004-02-12 00:47:09 +000069#define CONFIG_BOOTDELAY 5
TsiChungLiew1692b482007-08-15 20:32:06 -050070#define CONFIG_MCFFEC
71#ifdef CONFIG_MCFFEC
TsiChungLiew1692b482007-08-15 20:32:06 -050072# define CONFIG_MII 1
TsiChung Liewe921c162008-08-19 00:37:13 +060073# define CONFIG_MII_INIT 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020074# define CONFIG_SYS_DISCOVER_PHY
75# define CONFIG_SYS_RX_ETH_BUFFER 8
76# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiew1692b482007-08-15 20:32:06 -050077
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020078# define CONFIG_SYS_FEC0_PINMUX 0
79# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
Wolfgang Denka1be4762008-05-20 16:00:29 +020080# define MCFFEC_TOUT_LOOP 50000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020081/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
82# ifndef CONFIG_SYS_DISCOVER_PHY
TsiChungLiew1692b482007-08-15 20:32:06 -050083# define FECDUPLEX FULL
84# define FECSPEED _100BASET
85# else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020086# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
87# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiew1692b482007-08-15 20:32:06 -050088# endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089# endif /* CONFIG_SYS_DISCOVER_PHY */
TsiChungLiew1692b482007-08-15 20:32:06 -050090#endif
91
92#ifdef CONFIG_MCFFEC
93# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
94# define CONFIG_IPADDR 192.162.1.2
95# define CONFIG_NETMASK 255.255.255.0
96# define CONFIG_SERVERIP 192.162.1.1
97# define CONFIG_GATEWAYIP 192.162.1.1
98# define CONFIG_OVERWRITE_ETHADDR_ONCE
99#endif /* CONFIG_MCFFEC */
100
101#define CONFIG_HOSTNAME M5272C3
102#define CONFIG_EXTRA_ENV_SETTINGS \
103 "netdev=eth0\0" \
104 "loadaddr=10000\0" \
105 "u-boot=u-boot.bin\0" \
106 "load=tftp ${loadaddr) ${u-boot}\0" \
107 "upd=run load; run prog\0" \
108 "prog=prot off ffe00000 ffe3ffff;" \
109 "era ffe00000 ffe3ffff;" \
110 "cp.b ${loadaddr} ffe00000 ${filesize};"\
111 "save\0" \
112 ""
wdenke65527f2004-02-12 00:47:09 +0000113
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200114#define CONFIG_SYS_PROMPT "-> "
115#define CONFIG_SYS_LONGHELP /* undef to save memory */
wdenke65527f2004-02-12 00:47:09 +0000116
Jon Loeliger446e1f52007-07-08 14:14:17 -0500117#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200118#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenke65527f2004-02-12 00:47:09 +0000119#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200120#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenke65527f2004-02-12 00:47:09 +0000121#endif
wdenke65527f2004-02-12 00:47:09 +0000122
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200123#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
124#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
125#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
126#define CONFIG_SYS_LOAD_ADDR 0x20000
127#define CONFIG_SYS_MEMTEST_START 0x400
128#define CONFIG_SYS_MEMTEST_END 0x380000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200129#define CONFIG_SYS_CLK 66000000
wdenke65527f2004-02-12 00:47:09 +0000130
131/*
132 * Low Level Configuration Settings
133 * (address mappings, register initial values, etc.)
134 * You should know what you are doing if you make changes here.
135 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200136#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
137#define CONFIG_SYS_SCR 0x0003
138#define CONFIG_SYS_SPR 0xffff
wdenke65527f2004-02-12 00:47:09 +0000139
wdenke65527f2004-02-12 00:47:09 +0000140/*-----------------------------------------------------------------------
141 * Definitions for initial stack pointer and data area (in DPRAM)
142 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200143#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200144#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
Wolfgang Denk0191e472010-10-26 14:34:52 +0200145#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenke65527f2004-02-12 00:47:09 +0000147
148/*-----------------------------------------------------------------------
149 * Start addresses for the final memory configuration
150 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200151 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenke65527f2004-02-12 00:47:09 +0000152 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200153#define CONFIG_SYS_SDRAM_BASE 0x00000000
154#define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */
155#define CONFIG_SYS_FLASH_BASE 0xffe00000
wdenke65527f2004-02-12 00:47:09 +0000156
157#ifdef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200158#define CONFIG_SYS_MONITOR_BASE 0x20000
wdenke65527f2004-02-12 00:47:09 +0000159#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200160#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
wdenke65527f2004-02-12 00:47:09 +0000161#endif
162
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200163#define CONFIG_SYS_MONITOR_LEN 0x20000
164#define CONFIG_SYS_MALLOC_LEN (256 << 10)
165#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
wdenke65527f2004-02-12 00:47:09 +0000166
167/*
168 * For booting Linux, the board info and command line data
169 * have to be in the first 8 MB of memory, since this is
170 * the maximum mapped by the Linux kernel during initialization ??
171 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200172#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
wdenke65527f2004-02-12 00:47:09 +0000173
TsiChung Liew12b340a2008-10-21 14:19:26 +0000174/*
wdenke65527f2004-02-12 00:47:09 +0000175 * FLASH organization
176 */
TsiChung Liew12b340a2008-10-21 14:19:26 +0000177#define CONFIG_SYS_FLASH_CFI
178#ifdef CONFIG_SYS_FLASH_CFI
179# define CONFIG_FLASH_CFI_DRIVER 1
180# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
181# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
182# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
183# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
184# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
185#endif
wdenke65527f2004-02-12 00:47:09 +0000186
187/*-----------------------------------------------------------------------
188 * Cache Configuration
189 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200190#define CONFIG_SYS_CACHELINE_SIZE 16
wdenke65527f2004-02-12 00:47:09 +0000191
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600192#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200193 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600194#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200195 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600196#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
197#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
198 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
199 CF_ACR_EN | CF_ACR_SM_ALL)
200#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
201 CF_CACR_DISD | CF_CACR_INVI | \
202 CF_CACR_CEIB | CF_CACR_DCM | \
203 CF_CACR_EUSP)
204
wdenke65527f2004-02-12 00:47:09 +0000205/*-----------------------------------------------------------------------
206 * Memory bank definitions
207 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200208#define CONFIG_SYS_BR0_PRELIM 0xFFE00201
209#define CONFIG_SYS_OR0_PRELIM 0xFFE00014
210#define CONFIG_SYS_BR1_PRELIM 0
211#define CONFIG_SYS_OR1_PRELIM 0
212#define CONFIG_SYS_BR2_PRELIM 0x30000001
213#define CONFIG_SYS_OR2_PRELIM 0xFFF80000
214#define CONFIG_SYS_BR3_PRELIM 0
215#define CONFIG_SYS_OR3_PRELIM 0
216#define CONFIG_SYS_BR4_PRELIM 0
217#define CONFIG_SYS_OR4_PRELIM 0
218#define CONFIG_SYS_BR5_PRELIM 0
219#define CONFIG_SYS_OR5_PRELIM 0
220#define CONFIG_SYS_BR6_PRELIM 0
221#define CONFIG_SYS_OR6_PRELIM 0
222#define CONFIG_SYS_BR7_PRELIM 0x00000701
223#define CONFIG_SYS_OR7_PRELIM 0xFFC0007C
wdenke65527f2004-02-12 00:47:09 +0000224
225/*-----------------------------------------------------------------------
226 * Port configuration
227 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200228#define CONFIG_SYS_PACNT 0x00000000
229#define CONFIG_SYS_PADDR 0x0000
230#define CONFIG_SYS_PADAT 0x0000
231#define CONFIG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */
232#define CONFIG_SYS_PBDDR 0x0000
233#define CONFIG_SYS_PBDAT 0x0000
234#define CONFIG_SYS_PDCNT 0x00000000
TsiChungLiew1692b482007-08-15 20:32:06 -0500235#endif /* _M5272C3_H */