Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2014 |
| 3 | * Marcel Ziswiler <marcel@ziswiler.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Simon Glass | 667aee9 | 2014-12-10 08:55:57 -0700 | [diff] [blame] | 9 | #include <dm.h> |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 10 | #include <asm/arch/gp_padctrl.h> |
| 11 | #include <asm/arch/pinmux.h> |
| 12 | #include <asm/gpio.h> |
| 13 | #include <i2c.h> |
| 14 | #include <netdev.h> |
| 15 | |
| 16 | #include "pinmux-config-apalis_t30.h" |
| 17 | |
| 18 | #define PMU_I2C_ADDRESS 0x2D |
| 19 | #define MAX_I2C_RETRY 3 |
| 20 | |
| 21 | /* |
| 22 | * Routine: pinmux_init |
| 23 | * Description: Do individual peripheral pinmux configs |
| 24 | */ |
| 25 | void pinmux_init(void) |
| 26 | { |
| 27 | pinmux_config_pingrp_table(tegra3_pinmux_common, |
| 28 | ARRAY_SIZE(tegra3_pinmux_common)); |
| 29 | |
| 30 | pinmux_config_pingrp_table(unused_pins_lowpower, |
| 31 | ARRAY_SIZE(unused_pins_lowpower)); |
| 32 | |
| 33 | /* Initialize any non-default pad configs (APB_MISC_GP regs) */ |
| 34 | pinmux_config_drvgrp_table(apalis_t30_padctrl, |
| 35 | ARRAY_SIZE(apalis_t30_padctrl)); |
| 36 | } |
| 37 | |
| 38 | #ifdef CONFIG_PCI_TEGRA |
| 39 | int tegra_pcie_board_init(void) |
| 40 | { |
Simon Glass | 667aee9 | 2014-12-10 08:55:57 -0700 | [diff] [blame] | 41 | struct udevice *dev; |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 42 | u8 addr, data[1]; |
| 43 | int err; |
| 44 | |
Simon Glass | a2723ae | 2015-01-25 08:26:55 -0700 | [diff] [blame] | 45 | err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 46 | if (err) { |
Simon Glass | 667aee9 | 2014-12-10 08:55:57 -0700 | [diff] [blame] | 47 | debug("%s: Cannot find PMIC I2C chip\n", __func__); |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 48 | return err; |
| 49 | } |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 50 | /* TPS659110: VDD2_OP_REG = 1.05V */ |
| 51 | data[0] = 0x27; |
| 52 | addr = 0x25; |
| 53 | |
Simon Glass | 7d72276 | 2015-01-12 18:02:07 -0700 | [diff] [blame] | 54 | err = dm_i2c_write(dev, addr, data, 1); |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 55 | if (err) { |
| 56 | debug("failed to set VDD supply\n"); |
| 57 | return err; |
| 58 | } |
| 59 | |
| 60 | /* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */ |
| 61 | data[0] = 0x0D; |
| 62 | addr = 0x24; |
| 63 | |
Simon Glass | 7d72276 | 2015-01-12 18:02:07 -0700 | [diff] [blame] | 64 | err = dm_i2c_write(dev, addr, data, 1); |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 65 | if (err) { |
| 66 | debug("failed to enable VDD supply\n"); |
| 67 | return err; |
| 68 | } |
| 69 | |
| 70 | /* TPS659110: LDO6_REG = 1.1V, ACTIVE */ |
| 71 | data[0] = 0x0D; |
| 72 | addr = 0x35; |
| 73 | |
Simon Glass | 7d72276 | 2015-01-12 18:02:07 -0700 | [diff] [blame] | 74 | err = dm_i2c_write(dev, addr, data, 1); |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 75 | if (err) { |
| 76 | debug("failed to set AVDD supply\n"); |
| 77 | return err; |
| 78 | } |
| 79 | |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 80 | return 0; |
| 81 | } |
| 82 | |
| 83 | int board_eth_init(bd_t *bis) |
| 84 | { |
| 85 | return pci_eth_init(bis); |
| 86 | } |
| 87 | #endif /* CONFIG_PCI_TEGRA */ |