Kumar Gala | 87ead05 | 2010-04-26 23:09:23 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010 Freescale Semiconductor, Inc. |
| 3 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Kumar Gala | 87ead05 | 2010-04-26 23:09:23 -0500 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <config.h> |
| 8 | #include <common.h> |
| 9 | #include <asm/io.h> |
| 10 | #include <asm/immap_85xx.h> |
| 11 | #include <asm/fsl_serdes.h> |
| 12 | |
| 13 | #define SRDS1_MAX_LANES 8 |
| 14 | |
| 15 | static u32 serdes1_prtcl_map; |
| 16 | |
| 17 | static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { |
| 18 | [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE}, |
| 19 | [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2}, |
| 20 | [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, |
| 21 | [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3}, |
| 22 | [0xb] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, |
| 23 | [0xc] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, |
| 24 | [0xd] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, |
| 25 | [0xe] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, |
| 26 | [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1}, |
| 27 | }; |
| 28 | |
| 29 | int is_serdes_configured(enum srds_prtcl prtcl) |
| 30 | { |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 31 | if (!(serdes1_prtcl_map & (1 << NONE))) |
| 32 | fsl_serdes_init(); |
| 33 | |
Kumar Gala | 87ead05 | 2010-04-26 23:09:23 -0500 | [diff] [blame] | 34 | return (1 << prtcl) & serdes1_prtcl_map; |
| 35 | } |
| 36 | |
| 37 | void fsl_serdes_init(void) |
| 38 | { |
| 39 | ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
| 40 | u32 pordevsr = in_be32(&gur->pordevsr); |
| 41 | u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> |
| 42 | MPC85xx_PORDEVSR_IO_SEL_SHIFT; |
| 43 | int lane; |
| 44 | |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 45 | if (serdes1_prtcl_map & (1 << NONE)) |
| 46 | return; |
| 47 | |
Kumar Gala | 87ead05 | 2010-04-26 23:09:23 -0500 | [diff] [blame] | 48 | debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); |
| 49 | |
Axel Lin | ab95b09 | 2013-05-26 15:00:30 +0800 | [diff] [blame] | 50 | if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { |
Kumar Gala | 87ead05 | 2010-04-26 23:09:23 -0500 | [diff] [blame] | 51 | printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); |
| 52 | return; |
| 53 | } |
| 54 | |
| 55 | for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { |
| 56 | enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; |
| 57 | serdes1_prtcl_map |= (1 << lane_prtcl); |
| 58 | } |
| 59 | |
| 60 | if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS)) |
| 61 | serdes1_prtcl_map |= (1 << SGMII_TSEC1); |
| 62 | |
| 63 | if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) |
| 64 | serdes1_prtcl_map |= (1 << SGMII_TSEC2); |
| 65 | |
| 66 | if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) |
| 67 | serdes1_prtcl_map |= (1 << SGMII_TSEC3); |
| 68 | |
| 69 | if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS)) |
| 70 | serdes1_prtcl_map |= (1 << SGMII_TSEC4); |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 71 | |
| 72 | /* Set the first bit to indicate serdes has been initialized */ |
| 73 | serdes1_prtcl_map |= (1 << NONE); |
Kumar Gala | 87ead05 | 2010-04-26 23:09:23 -0500 | [diff] [blame] | 74 | } |