blob: 457042c7aae954112a3511a5a940bacc04a0f443 [file] [log] [blame]
Sergiu Moga65c723f2022-04-01 12:27:24 +03001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
4 */
5
6#include <asm/arch/hardware.h>
7#include <asm/io.h>
8#include <asm/arch/at91_rstc.h>
9#include <clk.h>
Sergiu Moga65c723f2022-04-01 12:27:24 +030010#include <cpu_func.h>
11#include <dm.h>
12#include <dm/device_compat.h>
13#include <dm/device-internal.h>
14#include <sysreset.h>
15
16static int at91_sysreset_request(struct udevice *dev, enum sysreset_t type)
17{
18 at91_rstc_t *rstc = (at91_rstc_t *)dev_get_priv(dev);
19
20 writel(AT91_RSTC_KEY
21 | AT91_RSTC_CR_PROCRST /* Processor Reset */
22 | AT91_RSTC_CR_PERRST /* Peripheral Reset */
23#ifdef CONFIG_AT91RESET_EXTRST
24 | AT91_RSTC_CR_EXTRST /* External Reset (assert nRST pin) */
25#endif
26 , &rstc->cr);
27
28 return -EINPROGRESS;
29}
30
31static int at91_sysreset_probe(struct udevice *dev)
32{
33 struct clk slck;
34 void *priv;
35 int ret;
36
37 priv = dev_remap_addr(dev);
38 if (!priv)
39 return -EINVAL;
40
41 dev_set_priv(dev, priv);
42
43 ret = clk_get_by_index(dev, 0, &slck);
44 if (ret)
45 return ret;
46
47 ret = clk_prepare_enable(&slck);
48 if (ret)
49 return ret;
50
51 return 0;
52}
53
54static struct sysreset_ops at91_sysreset = {
55 .request = at91_sysreset_request,
56};
57
Sergiu Moga65c723f2022-04-01 12:27:24 +030058U_BOOT_DRIVER(sysreset_at91) = {
59 .id = UCLASS_SYSRESET,
Sergiu Mogabdcfc7d2023-01-04 16:03:18 +020060 .name = "at91_sysreset",
Sergiu Moga65c723f2022-04-01 12:27:24 +030061 .ops = &at91_sysreset,
62 .probe = at91_sysreset_probe,
Sergiu Moga65c723f2022-04-01 12:27:24 +030063};