blob: c73ac5f0f454a38247b87a9a7d6d06c9d3d54417 [file] [log] [blame]
Stephen Warrenf5dc27a2012-01-06 12:14:42 +00001/*
2 * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 */
16
17#include <common.h>
18#include <asm/io.h>
Tom Warrenab371962012-09-19 15:50:56 -070019#include <asm/arch/tegra.h>
Stephen Warrenf5dc27a2012-01-06 12:14:42 +000020#include <asm/arch/pinmux.h>
Tom Warrenab371962012-09-19 15:50:56 -070021#include <asm/arch-tegra/mmc.h>
Stephen Warrenf5dc27a2012-01-06 12:14:42 +000022#include <asm/gpio.h>
Tom Warren2967d482012-06-01 08:22:14 +000023#ifdef CONFIG_TEGRA_MMC
Stephen Warrenf5dc27a2012-01-06 12:14:42 +000024#include <mmc.h>
25#endif
26
27/*
28 * Routine: gpio_config_uart
29 * Description: Does nothing on Paz00 - no conflict w/SPI.
30 */
31void gpio_config_uart(void)
32{
33}
34
Tom Warren2967d482012-06-01 08:22:14 +000035#ifdef CONFIG_TEGRA_MMC
Stephen Warrenf5dc27a2012-01-06 12:14:42 +000036/*
37 * Routine: pin_mux_mmc
38 * Description: setup the pin muxes/tristate values for the SDMMC(s)
39 */
40static void pin_mux_mmc(void)
41{
42 /* SDMMC4: config 3, x8 on 2nd set of pins */
43 pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
44 pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
45 pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
46
47 pinmux_tristate_disable(PINGRP_ATB);
48 pinmux_tristate_disable(PINGRP_GMA);
49 pinmux_tristate_disable(PINGRP_GME);
50
Lucas Stach2249fb62012-05-16 08:21:01 +000051 /* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */
52 pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1);
Stephen Warrenf5dc27a2012-01-06 12:14:42 +000053
Lucas Stach2249fb62012-05-16 08:21:01 +000054 pinmux_tristate_disable(PINGRP_SDIO1);
Stephen Warrenf5dc27a2012-01-06 12:14:42 +000055
56 /* For power GPIO PV1 */
57 pinmux_tristate_disable(PINGRP_UAC);
Stephen Warren07dde1e2012-05-15 11:58:11 +000058 /* For CD GPIO PV5 */
59 pinmux_tristate_disable(PINGRP_GPV);
Stephen Warrenf5dc27a2012-01-06 12:14:42 +000060}
61
62/* this is a weak define that we are overriding */
63int board_mmc_init(bd_t *bd)
64{
65 debug("board_mmc_init called\n");
66
67 /* Enable muxes, etc. for SDMMC controllers */
68 pin_mux_mmc();
69
70 debug("board_mmc_init: init eMMC\n");
71 /* init dev 0, eMMC chip, with 4-bit bus */
72 /* The board has an 8-bit bus, but 8-bit doesn't work yet */
Tom Warren22562a42012-09-04 17:00:24 -070073 tegra_mmc_init(0, 4, -1, -1);
Stephen Warrenf5dc27a2012-01-06 12:14:42 +000074
75 debug("board_mmc_init: init SD slot\n");
76 /* init dev 3, SD slot, with 4-bit bus */
Tom Warren22562a42012-09-04 17:00:24 -070077 tegra_mmc_init(3, 4, GPIO_PV1, GPIO_PV5);
Stephen Warrenf5dc27a2012-01-06 12:14:42 +000078
79 return 0;
80}
81#endif