blob: aaa243f29178e027e4f92c92e4acf7e568fb42f0 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glass40ffb682015-01-27 22:13:31 -07002/*
3 * Copyright (c) 2015, Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
5 * All rights reserved.
Simon Glass40ffb682015-01-27 22:13:31 -07006 */
7
8#include <common.h>
Stefan Roeseb0ff2c12016-07-18 12:51:39 +02009#include <dm.h>
Simon Glass97589732020-05-10 11:40:02 -060010#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -060011#include <log.h>
Simon Glass40ffb682015-01-27 22:13:31 -070012#include <pci.h>
13#include <usb.h>
Jean-Jacques Hiblotad4142b2019-09-11 11:33:46 +020014#include <usb/xhci.h>
Simon Glass40ffb682015-01-27 22:13:31 -070015
Pali Rohárde1627b2021-01-18 12:30:04 +010016static int xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
17 struct xhci_hcor **ret_hcor)
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020018{
19 struct xhci_hccr *hccr;
20 struct xhci_hcor *hcor;
21 u32 cmd;
22
23 hccr = (struct xhci_hccr *)dm_pci_map_bar(dev,
24 PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
Pali Rohárde1627b2021-01-18 12:30:04 +010025 if (!hccr) {
26 printf("xhci-pci init cannot map PCI mem bar\n");
27 return -EIO;
28 }
29
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020030 hcor = (struct xhci_hcor *)((uintptr_t) hccr +
31 HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
32
Bin Meng7380f7a2018-06-03 19:04:14 -070033 debug("XHCI-PCI init hccr %p and hcor %p hc_length %d\n",
34 hccr, hcor, (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020035
36 *ret_hccr = hccr;
37 *ret_hcor = hcor;
38
39 /* enable busmaster */
40 dm_pci_read_config32(dev, PCI_COMMAND, &cmd);
41 cmd |= PCI_COMMAND_MASTER;
42 dm_pci_write_config32(dev, PCI_COMMAND, cmd);
Pali Rohárde1627b2021-01-18 12:30:04 +010043 return 0;
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020044}
45
46static int xhci_pci_probe(struct udevice *dev)
47{
48 struct xhci_hccr *hccr;
49 struct xhci_hcor *hcor;
Pali Rohárde1627b2021-01-18 12:30:04 +010050 int ret;
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020051
Pali Rohárde1627b2021-01-18 12:30:04 +010052 ret = xhci_pci_init(dev, &hccr, &hcor);
53 if (ret)
54 return ret;
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020055
56 return xhci_register(dev, hccr, hcor);
57}
58
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020059static const struct udevice_id xhci_pci_ids[] = {
60 { .compatible = "xhci-pci" },
61 { }
62};
63
64U_BOOT_DRIVER(xhci_pci) = {
65 .name = "xhci_pci",
66 .id = UCLASS_USB,
67 .probe = xhci_pci_probe,
Bin Mengaff38b92017-07-19 21:51:08 +080068 .remove = xhci_deregister,
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020069 .of_match = xhci_pci_ids,
70 .ops = &xhci_usb_ops,
Simon Glassb75b15b2020-12-03 16:55:23 -070071 .plat_auto = sizeof(struct usb_plat),
Simon Glass8a2b47f2020-12-03 16:55:17 -070072 .priv_auto = sizeof(struct xhci_ctrl),
Nicolas Saenz Julienne96316252021-01-14 16:49:00 +010073 .flags = DM_FLAG_OS_PREPARE | DM_FLAG_ALLOC_PRIV_DMA,
Stefan Roeseb0ff2c12016-07-18 12:51:39 +020074};
75
76static struct pci_device_id xhci_pci_supported[] = {
77 { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0) },
78 {},
79};
80
81U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported);