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git01.mediatek.com / filogic / uboot / ab06a533f08effbbaa2de381e61b6b33778b4b5d / . / src / arm / aspeed / aspeed-bmc-facebook-yosemite4.dts
blob: 29f224bccd6353bf4297a090c887a882056c6464 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later
2// Copyright 2022 Facebook Inc.
3
4/dts-v1/;
5#include "aspeed-g6.dtsi"
6#include <dt-bindings/gpio/aspeed-gpio.h>
7#include <dt-bindings/leds/leds-pca955x.h>
8#include <dt-bindings/i2c/i2c.h>
9
10/ {
11 model = "Facebook Yosemite 4 BMC";
12 compatible = "facebook,yosemite4-bmc", "aspeed,ast2600";
13
14 aliases {
15 serial4 = &uart5;
16 serial5 = &uart6;
17 serial6 = &uart7;
18 serial7 = &uart8;
19 serial8 = &uart9;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]20
21 i2c16 = &imux16;
22 i2c17 = &imux17;
23 i2c18 = &imux18;
24 i2c19 = &imux19;
25 i2c20 = &imux20;
26 i2c21 = &imux21;
27 i2c22 = &imux22;
28 i2c23 = &imux23;
29 i2c24 = &imux24;
30 i2c25 = &imux25;
31 i2c26 = &imux26;
32 i2c27 = &imux27;
33 i2c28 = &imux28;
34 i2c29 = &imux29;
35 i2c30 = &imux30;
36 i2c31 = &imux31;
37 i2c32 = &imux32;
38 i2c33 = &imux33;
39 i2c34 = &imux34;
40 i2c35 = &imux35;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]41 };
42
43 chosen {
44 stdout-path = "serial4:57600n8";
45 };
46
47 memory@80000000 {
48 device_type = "memory";
49 reg = <0x80000000 0x80000000>;
50 };
51
52 iio-hwmon {
53 compatible = "iio-hwmon";
54 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
55 <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]56 <&adc1 0>, <&adc1 1>, <&adc1 7>;
57 };
58
59 spi {
60 compatible = "spi-gpio";
61 #address-cells = <1>;
62 #size-cells = <0>;
63
64 sck-gpios = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
65 mosi-gpios = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
66 miso-gpios = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
67 cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
68 num-chipselects = <1>;
69
70 tpm@0 {
71 compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
72 reg = <0>;
73 spi-max-frequency = <33000000>;
74 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]75 };
76};
77
78&uart1 {
79 status = "okay";
80};
81
82&uart2 {
83 status = "okay";
84};
85
86&uart3 {
87 status = "okay";
88};
89
90&uart4 {
91 status = "okay";
92};
93
94&uart5 {
95 status = "okay";
96};
97
98&uart6 {
99 status = "okay";
100};
101
102&uart7 {
103 status = "okay";
104};
105
106&uart8 {
107 status = "okay";
108};
109
110&uart9 {
111 status = "okay";
112};
113
114&wdt1 {
115 status = "okay";
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_wdtrst1_default>;
118 aspeed,reset-type = "soc";
119 aspeed,external-signal;
120 aspeed,ext-push-pull;
121 aspeed,ext-active-high;
122 aspeed,ext-pulse-duration = <256>;
123};
124
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]125&wdt2 {
126 status = "okay";
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_wdtrst2_default>;
129 aspeed,reset-type = "system";
130};
131
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]132&mac2 {
133 status = "okay";
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_rmii3_default>;
136 use-ncsi;
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]137 mellanox,multi-host;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]138};
139
140&mac3 {
141 status = "okay";
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_rmii4_default>;
144 use-ncsi;
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]145 mellanox,multi-host;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]146};
147
148&fmc {
149 status = "okay";
150 flash@0 {
151 status = "okay";
152 m25p,fast-read;
153 label = "bmc";
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]154 spi-tx-bus-width = <2>;
155 spi-rx-bus-width = <2>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]156 spi-max-frequency = <50000000>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]157#include "openbmc-flash-layout-128.dtsi"
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]158 };
159 flash@1 {
160 status = "okay";
161 m25p,fast-read;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]162 label = "alt-bmc";
163 spi-tx-bus-width = <2>;
164 spi-rx-bus-width = <2>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]165 spi-max-frequency = <50000000>;
166 };
167};
168
169&i2c0 {
170 status = "okay";
171 mctp-controller;
172 bus-frequency = <400000>;
173 multi-master;
174
175 mctp@10 {
176 compatible = "mctp-i2c-controller";
177 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
178 };
179
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]180 gpio@21 {
181 compatible = "nxp,pca9506";
182 reg = <0x21>;
183 gpio-controller;
184 #gpio-cells = <2>;
185 };
186
187 gpio@22 {
188 compatible = "nxp,pca9506";
189 reg = <0x22>;
190 gpio-controller;
191 #gpio-cells = <2>;
192 };
193
194 gpio@23 {
195 compatible = "nxp,pca9506";
196 reg = <0x23>;
197 gpio-controller;
198 #gpio-cells = <2>;
199 };
200
201 gpio@24 {
202 compatible = "nxp,pca9506";
203 reg = <0x24>;
204 gpio-controller;
205 #gpio-cells = <2>;
206 };
207
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]208 power-sensor@40 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]209 compatible = "adi,adm1281";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]210 reg = <0x40>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]211 shunt-resistor-micro-ohms = <500>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]212 };
213};
214
215&i2c1 {
216 status = "okay";
217 mctp-controller;
218 bus-frequency = <400000>;
219 multi-master;
220
221 mctp@10 {
222 compatible = "mctp-i2c-controller";
223 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
224 };
225
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]226 gpio@21 {
227 compatible = "nxp,pca9506";
228 reg = <0x21>;
229 gpio-controller;
230 #gpio-cells = <2>;
231 };
232
233 gpio@22 {
234 compatible = "nxp,pca9506";
235 reg = <0x22>;
236 gpio-controller;
237 #gpio-cells = <2>;
238 };
239
240 gpio@23 {
241 compatible = "nxp,pca9506";
242 reg = <0x23>;
243 gpio-controller;
244 #gpio-cells = <2>;
245 };
246
247 gpio@24 {
248 compatible = "nxp,pca9506";
249 reg = <0x24>;
250 gpio-controller;
251 #gpio-cells = <2>;
252 };
253
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]254 power-sensor@40 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]255 compatible = "adi,adm1281";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]256 reg = <0x40>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]257 shunt-resistor-micro-ohms = <500>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]258 };
259};
260
261&i2c2 {
262 status = "okay";
263 mctp-controller;
264 bus-frequency = <400000>;
265 multi-master;
266
267 mctp@10 {
268 compatible = "mctp-i2c-controller";
269 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
270 };
271
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]272 gpio@21 {
273 compatible = "nxp,pca9506";
274 reg = <0x21>;
275 gpio-controller;
276 #gpio-cells = <2>;
277 };
278
279 gpio@22 {
280 compatible = "nxp,pca9506";
281 reg = <0x22>;
282 gpio-controller;
283 #gpio-cells = <2>;
284 };
285
286 gpio@23 {
287 compatible = "nxp,pca9506";
288 reg = <0x23>;
289 gpio-controller;
290 #gpio-cells = <2>;
291 };
292
293 gpio@24 {
294 compatible = "nxp,pca9506";
295 reg = <0x24>;
296 gpio-controller;
297 #gpio-cells = <2>;
298 };
299
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]300 power-sensor@40 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]301 compatible = "adi,adm1281";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]302 reg = <0x40>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]303 shunt-resistor-micro-ohms = <500>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]304 };
305};
306
307&i2c3 {
308 status = "okay";
309 mctp-controller;
310 bus-frequency = <400000>;
311 multi-master;
312
313 mctp@10 {
314 compatible = "mctp-i2c-controller";
315 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
316 };
317
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]318 gpio@21 {
319 compatible = "nxp,pca9506";
320 reg = <0x21>;
321 gpio-controller;
322 #gpio-cells = <2>;
323 };
324
325 gpio@22 {
326 compatible = "nxp,pca9506";
327 reg = <0x22>;
328 gpio-controller;
329 #gpio-cells = <2>;
330 };
331
332 gpio@23 {
333 compatible = "nxp,pca9506";
334 reg = <0x23>;
335 gpio-controller;
336 #gpio-cells = <2>;
337 };
338
339 gpio@24 {
340 compatible = "nxp,pca9506";
341 reg = <0x24>;
342 gpio-controller;
343 #gpio-cells = <2>;
344 };
345
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]346 power-sensor@40 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]347 compatible = "adi,adm1281";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]348 reg = <0x40>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]349 shunt-resistor-micro-ohms = <500>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]350 };
351};
352
353&i2c4 {
354 status = "okay";
355 mctp-controller;
356 bus-frequency = <400000>;
357 multi-master;
358
359 mctp@10 {
360 compatible = "mctp-i2c-controller";
361 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
362 };
363
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]364 gpio@21 {
365 compatible = "nxp,pca9506";
366 reg = <0x21>;
367 gpio-controller;
368 #gpio-cells = <2>;
369 };
370
371 gpio@22 {
372 compatible = "nxp,pca9506";
373 reg = <0x22>;
374 gpio-controller;
375 #gpio-cells = <2>;
376 };
377
378 gpio@23 {
379 compatible = "nxp,pca9506";
380 reg = <0x23>;
381 gpio-controller;
382 #gpio-cells = <2>;
383 };
384
385 gpio@24 {
386 compatible = "nxp,pca9506";
387 reg = <0x24>;
388 gpio-controller;
389 #gpio-cells = <2>;
390 };
391
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]392 power-sensor@40 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]393 compatible = "adi,adm1281";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]394 reg = <0x40>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]395 shunt-resistor-micro-ohms = <500>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]396 };
397};
398
399&i2c5 {
400 status = "okay";
401 mctp-controller;
402 bus-frequency = <400000>;
403 multi-master;
404
405 mctp@10 {
406 compatible = "mctp-i2c-controller";
407 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
408 };
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]409
410 gpio@21 {
411 compatible = "nxp,pca9506";
412 reg = <0x21>;
413 gpio-controller;
414 #gpio-cells = <2>;
415 };
416
417 gpio@22 {
418 compatible = "nxp,pca9506";
419 reg = <0x22>;
420 gpio-controller;
421 #gpio-cells = <2>;
422 };
423
424 gpio@23 {
425 compatible = "nxp,pca9506";
426 reg = <0x23>;
427 gpio-controller;
428 #gpio-cells = <2>;
429 };
430
431 gpio@24 {
432 compatible = "nxp,pca9506";
433 reg = <0x24>;
434 gpio-controller;
435 #gpio-cells = <2>;
436 };
437
438 power-sensor@40 {
439 compatible = "adi,adm1281";
440 reg = <0x40>;
441 shunt-resistor-micro-ohms = <500>;
442 };
443};
444
445&i2c6 {
446 status = "okay";
447 mctp-controller;
448 bus-frequency = <400000>;
449 multi-master;
450
451 mctp@10 {
452 compatible = "mctp-i2c-controller";
453 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
454 };
455
456 gpio@21 {
457 compatible = "nxp,pca9506";
458 reg = <0x21>;
459 gpio-controller;
460 #gpio-cells = <2>;
461 };
462
463 gpio@22 {
464 compatible = "nxp,pca9506";
465 reg = <0x22>;
466 gpio-controller;
467 #gpio-cells = <2>;
468 };
469
470 gpio@23 {
471 compatible = "nxp,pca9506";
472 reg = <0x23>;
473 gpio-controller;
474 #gpio-cells = <2>;
475 };
476
477 gpio@24 {
478 compatible = "nxp,pca9506";
479 reg = <0x24>;
480 gpio-controller;
481 #gpio-cells = <2>;
482 };
483
484 power-sensor@40 {
485 compatible = "adi,adm1281";
486 reg = <0x40>;
487 shunt-resistor-micro-ohms = <500>;
488 };
489};
490
491&i2c7 {
492 status = "okay";
493 mctp-controller;
494 bus-frequency = <400000>;
495 multi-master;
496
497 mctp@10 {
498 compatible = "mctp-i2c-controller";
499 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
500 };
501
502 gpio@21 {
503 compatible = "nxp,pca9506";
504 reg = <0x21>;
505 gpio-controller;
506 #gpio-cells = <2>;
507 };
508
509 gpio@22 {
510 compatible = "nxp,pca9506";
511 reg = <0x22>;
512 gpio-controller;
513 #gpio-cells = <2>;
514 };
515
516 gpio@23 {
517 compatible = "nxp,pca9506";
518 reg = <0x23>;
519 gpio-controller;
520 #gpio-cells = <2>;
521 };
522
523 gpio@24 {
524 compatible = "nxp,pca9506";
525 reg = <0x24>;
526 gpio-controller;
527 #gpio-cells = <2>;
528 };
529
530 power-sensor@40 {
531 compatible = "adi,adm1281";
532 reg = <0x40>;
533 shunt-resistor-micro-ohms = <500>;
534 };
535};
536
537&i2c8 {
538 #address-cells = <1>;
539 #size-cells = <0>;
540 status = "okay";
541 bus-frequency = <400000>;
542 i2c-mux@70 {
543 compatible = "nxp,pca9544";
544 reg = <0x70>;
545 #address-cells = <1>;
546 #size-cells = <0>;
547 i2c-mux-idle-disconnect;
548
549 imux16: i2c@0 {
550 reg = <0>;
551 #address-cells = <1>;
552 #size-cells = <0>;
553 gpio@49 {
554 compatible = "nxp,pca9537";
555 reg = <0x49>;
556 gpio-controller;
557 #gpio-cells = <2>;
558 };
559
560 eeprom@50 {
561 compatible = "atmel,24c128";
562 reg = <0x50>;
563 };
564
565 eeprom@51 {
566 compatible = "atmel,24c128";
567 reg = <0x51>;
568 };
569
570 eeprom@54 {
571 compatible = "atmel,24c128";
572 reg = <0x54>;
573 };
574 };
575
576 imux17: i2c@1 {
577 reg = <1>;
578 #address-cells = <1>;
579 #size-cells = <0>;
580 gpio@49 {
581 compatible = "nxp,pca9537";
582 reg = <0x49>;
583 gpio-controller;
584 #gpio-cells = <2>;
585 };
586
587 eeprom@50 {
588 compatible = "atmel,24c128";
589 reg = <0x50>;
590 };
591
592 eeprom@51 {
593 compatible = "atmel,24c128";
594 reg = <0x51>;
595 };
596
597 eeprom@54 {
598 compatible = "atmel,24c128";
599 reg = <0x54>;
600 };
601 };
602
603 imux18: i2c@2 {
604 reg = <2>;
605 #address-cells = <1>;
606 #size-cells = <0>;
607 gpio@49 {
608 compatible = "nxp,pca9537";
609 reg = <0x49>;
610 gpio-controller;
611 #gpio-cells = <2>;
612 };
613
614 eeprom@50 {
615 compatible = "atmel,24c128";
616 reg = <0x50>;
617 };
618
619 eeprom@51 {
620 compatible = "atmel,24c128";
621 reg = <0x51>;
622 };
623
624 eeprom@54 {
625 compatible = "atmel,24c128";
626 reg = <0x54>;
627 };
628 };
629
630 imux19: i2c@3 {
631 reg = <3>;
632 #address-cells = <1>;
633 #size-cells = <0>;
634 gpio@49 {
635 compatible = "nxp,pca9537";
636 reg = <0x49>;
637 gpio-controller;
638 #gpio-cells = <2>;
639 };
640
641 eeprom@50 {
642 compatible = "atmel,24c128";
643 reg = <0x50>;
644 };
645
646 eeprom@51 {
647 compatible = "atmel,24c128";
648 reg = <0x51>;
649 };
650
651 eeprom@54 {
652 compatible = "atmel,24c128";
653 reg = <0x54>;
654 };
655 };
656 };
657};
658
659&i2c9 {
660 #address-cells = <1>;
661 #size-cells = <0>;
662 status = "okay";
663 bus-frequency = <400000>;
664 i2c-mux@71 {
665 compatible = "nxp,pca9544";
666 reg = <0x71>;
667 #address-cells = <1>;
668 #size-cells = <0>;
669 i2c-mux-idle-disconnect;
670
671 imux20: i2c@0 {
672 reg = <0>;
673 #address-cells = <1>;
674 #size-cells = <0>;
675 gpio@49 {
676 compatible = "nxp,pca9537";
677 reg = <0x49>;
678 gpio-controller;
679 #gpio-cells = <2>;
680 };
681
682 eeprom@50 {
683 compatible = "atmel,24c128";
684 reg = <0x50>;
685 };
686
687 eeprom@51 {
688 compatible = "atmel,24c128";
689 reg = <0x51>;
690 };
691
692 eeprom@54 {
693 compatible = "atmel,24c128";
694 reg = <0x54>;
695 };
696 };
697
698 imux21: i2c@1 {
699 reg = <1>;
700 #address-cells = <1>;
701 #size-cells = <0>;
702 gpio@49 {
703 compatible = "nxp,pca9537";
704 reg = <0x49>;
705 gpio-controller;
706 #gpio-cells = <2>;
707 };
708
709 eeprom@50 {
710 compatible = "atmel,24c128";
711 reg = <0x50>;
712 };
713
714 eeprom@51 {
715 compatible = "atmel,24c128";
716 reg = <0x51>;
717 };
718
719 eeprom@54 {
720 compatible = "atmel,24c128";
721 reg = <0x54>;
722 };
723 };
724
725 imux22: i2c@2 {
726 reg = <2>;
727 #address-cells = <1>;
728 #size-cells = <0>;
729 gpio@49 {
730 compatible = "nxp,pca9537";
731 reg = <0x49>;
732 gpio-controller;
733 #gpio-cells = <2>;
734 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]735
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]736 eeprom@50 {
737 compatible = "atmel,24c128";
738 reg = <0x50>;
739 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]740
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]741 eeprom@51 {
742 compatible = "atmel,24c128";
743 reg = <0x51>;
744 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]745
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]746 eeprom@54 {
747 compatible = "atmel,24c128";
748 reg = <0x54>;
749 };
750 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]751
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]752 imux23: i2c@3 {
753 reg = <3>;
754 #address-cells = <1>;
755 #size-cells = <0>;
756 gpio@49 {
757 compatible = "nxp,pca9537";
758 reg = <0x49>;
759 gpio-controller;
760 #gpio-cells = <2>;
761 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]762
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]763 eeprom@50 {
764 compatible = "atmel,24c128";
765 reg = <0x50>;
766 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]767
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]768 eeprom@51 {
769 compatible = "atmel,24c128";
770 reg = <0x51>;
771 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]772
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]773 eeprom@54 {
774 compatible = "atmel,24c128";
775 reg = <0x54>;
776 };
777 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]778 };
779};
780
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]781&i2c10 {
782 #address-cells = <1>;
783 #size-cells = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]784 status = "okay";
785 bus-frequency = <400000>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]786 i2c-mux@74 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]787 compatible = "nxp,pca9544";
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]788 reg = <0x74>;
789 #address-cells = <1>;
790 #size-cells = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]791 i2c-mux-idle-disconnect;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]792
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]793 imux28: i2c@0 {
794 reg = <0>;
795 #address-cells = <1>;
796 #size-cells = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]797
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]798 gpio@20 {
799 compatible = "nxp,pca9506";
800 reg = <0x20>;
801 gpio-controller;
802 #gpio-cells = <2>;
803 };
804
805 gpio@21 {
806 compatible = "nxp,pca9506";
807 reg = <0x21>;
808 gpio-controller;
809 #gpio-cells = <2>;
810 };
811
812 gpio@22 {
813 compatible = "nxp,pca9506";
814 reg = <0x22>;
815 gpio-controller;
816 #gpio-cells = <2>;
817 };
818
819 gpio@23 {
820 compatible = "nxp,pca9506";
821 reg = <0x23>;
822 gpio-controller;
823 #gpio-cells = <2>;
824 };
825
826 gpio@24 {
827 compatible = "nxp,pca9506";
828 reg = <0x24>;
829 gpio-controller;
830 #gpio-cells = <2>;
831 gpio-line-names = "","","","",
832 "NIC0_MAIN_PWR_EN",
833 "NIC1_MAIN_PWR_EN",
834 "NIC2_MAIN_PWR_EN",
835 "NIC3_MAIN_PWR_EN",
836 "","","","","","","","",
837 "","","","","","","","",
838 "","","","","","","","";
839 };
840 };
841
842 imux29: i2c@1 {
843 reg = <1>;
844 #address-cells = <1>;
845 #size-cells = <0>;
846 };
847 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]848};
849
850&i2c11 {
851 status = "okay";
852 power-sensor@10 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]853 compatible = "adi,adm1272";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]854 reg = <0x10>;
855 };
856
857 power-sensor@12 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]858 compatible = "adi,adm1272";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]859 reg = <0x12>;
860 };
861
862 gpio@20 {
863 compatible = "nxp,pca9555";
864 reg = <0x20>;
865 gpio-controller;
866 #gpio-cells = <2>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]867 interrupt-parent = <&gpio0>;
868 interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
869 gpio-line-names = "P48V_OCP_GPIO1", "P48V_OCP_GPIO2",
870 "P48V_OCP_GPIO3", "FAN_BOARD_0_REVISION_0_R",
871 "FAN_BOARD_0_REVISION_1_R",
872 "FAN_BOARD_1_REVISION_0_R",
873 "FAN_BOARD_1_REVISION_1_R", "RST_MUX_R_N",
874 "RST_LED_CONTROL_FAN_BOARD_0_N",
875 "RST_LED_CONTROL_FAN_BOARD_1_N",
876 "RST_IOEXP_FAN_BOARD_0_N",
877 "RST_IOEXP_FAN_BOARD_1_N",
878 "PWRGD_LOAD_SWITCH_FAN_BOARD_0_R",
879 "PWRGD_LOAD_SWITCH_FAN_BOARD_1_R",
880 "", "";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]881 };
882
883 gpio@21 {
884 compatible = "nxp,pca9555";
885 reg = <0x21>;
886 gpio-controller;
887 #gpio-cells = <2>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]888 interrupt-parent = <&gpio0>;
889 interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
890 gpio-line-names = "HSC_OCP_SLOT_ODD_GPIO1",
891 "HSC_OCP_SLOT_ODD_GPIO2",
892 "HSC_OCP_SLOT_ODD_GPIO3",
893 "HSC_OCP_SLOT_EVEN_GPIO1",
894 "HSC_OCP_SLOT_EVEN_GPIO2",
895 "HSC_OCP_SLOT_EVEN_GPIO3",
896 "ADC_TYPE_0_R", "ADC_TYPE_1_R",
897 "MEDUSA_BOARD_REV_0", "MEDUSA_BOARD_REV_1",
898 "MEDUSA_BOARD_REV_2", "MEDUSA_BOARD_TYPE",
899 "DELTA_MODULE_TYPE", "P12V_HSC_TYPE",
900 "", "";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]901 };
902
903 gpio@22 {
904 compatible = "nxp,pca9555";
905 reg = <0x22>;
906 gpio-controller;
907 #gpio-cells = <2>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]908 interrupt-parent = <&gpio0>;
909 interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
910 gpio-line-names = "CARD_TYPE_SLOT1", "CARD_TYPE_SLOT2",
911 "CARD_TYPE_SLOT3", "CARD_TYPE_SLOT4",
912 "CARD_TYPE_SLOT5", "CARD_TYPE_SLOT6",
913 "CARD_TYPE_SLOT7", "CARD_TYPE_SLOT8",
914 "OC_P48V_HSC_0_N", "FLT_P48V_HSC_0_N",
915 "OC_P48V_HSC_1_N", "FLT_P48V_HSC_1_N",
916 "EN_P48V_AUX_0", "EN_P48V_AUX_1",
917 "PWRGD_P12V_AUX_0", "PWRGD_P12V_AUX_1";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]918 };
919
920 gpio@23 {
921 compatible = "nxp,pca9555";
922 reg = <0x23>;
923 gpio-controller;
924 #gpio-cells = <2>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]925 interrupt-parent = <&gpio0>;
926 interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
927 gpio-line-names = "HSC1_ALERT1_R_N", "HSC2_ALERT1_R_N",
928 "HSC3_ALERT1_R_N", "HSC4_ALERT1_R_N",
929 "HSC5_ALERT1_R_N", "HSC6_ALERT1_R_N",
930 "HSC7_ALERT1_R_N", "HSC8_ALERT1_R_N",
931 "HSC1_ALERT2_R_N", "HSC2_ALERT2_R_N",
932 "HSC3_ALERT2_R_N", "HSC4_ALERT2_R_N",
933 "HSC5_ALERT2_R_N", "HSC6_ALERT2_R_N",
934 "HSC7_ALERT2_R_N", "HSC8_ALERT2_R_N";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]935 };
936
937 temperature-sensor@48 {
938 compatible = "ti,tmp75";
939 reg = <0x48>;
940 };
941
942 temperature-sensor@49 {
943 compatible = "ti,tmp75";
944 reg = <0x49>;
945 };
946
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]947 eeprom@54 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]948 compatible = "atmel,24c128";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]949 reg = <0x54>;
950 };
951};
952
953&i2c12 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]954 #address-cells = <1>;
955 #size-cells = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]956 status = "okay";
957 bus-frequency = <400000>;
958
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]959 i2c-mux@70 {
960 compatible = "nxp,pca9544";
961 reg = <0x70>;
962 #address-cells = <1>;
963 #size-cells = <0>;
964 i2c-mux-idle-disconnect;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]965
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]966 imux34: i2c@0 {
967 reg = <0>;
968 #address-cells = <1>;
969 #size-cells = <0>;
970
971 temperature-sensor@48 {
972 compatible = "ti,tmp75";
973 reg = <0x48>;
974 };
975
976 eeprom@50 {
977 compatible = "atmel,24c128";
978 reg = <0x50>;
979 };
980
981 eeprom@54 {
982 compatible = "atmel,24c64";
983 reg = <0x54>;
984 };
985
986 rtc@6f {
987 compatible = "nuvoton,nct3018y";
988 reg = <0x6f>;
989 };
990
991 gpio@20 {
992 compatible = "nxp,pca9506";
993 reg = <0x20>;
994 gpio-controller;
995 #gpio-cells = <2>;
996 };
997
998 gpio@21 {
999 compatible = "nxp,pca9506";
1000 reg = <0x21>;
1001 gpio-controller;
1002 #gpio-cells = <2>;
1003 };
1004
1005 gpio@22 {
1006 compatible = "nxp,pca9506";
1007 reg = <0x22>;
1008 gpio-controller;
1009 #gpio-cells = <2>;
1010 };
1011
1012 gpio@23 {
1013 compatible = "nxp,pca9506";
1014 reg = <0x23>;
1015 gpio-controller;
1016 #gpio-cells = <2>;
1017 };
1018 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1019
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1020 imux35: i2c@1 {
1021 reg = <1>;
1022 #address-cells = <1>;
1023 #size-cells = <0>;
1024 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1025 };
1026};
1027
1028&i2c13 {
1029 status = "okay";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1030 bus-frequency = <100000>;
1031 multi-master;
1032
1033 ipmb@10 {
1034 compatible = "ipmb-dev";
1035 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
1036 i2c-protocol;
1037 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1038};
1039
1040&i2c14 {
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1041 #address-cells = <1>;
1042 #size-cells = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1043 status = "okay";
1044 bus-frequency = <400000>;
1045 adc@1d {
1046 compatible = "ti,adc128d818";
1047 reg = <0x1d>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1048 ti,mode = /bits/ 8 <1>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1049 };
1050
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1051 adc@36 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1052 compatible = "ti,adc128d818";
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1053 reg = <0x36>;
1054 ti,mode = /bits/ 8 <1>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1055 };
1056
1057 adc@37 {
1058 compatible = "ti,adc128d818";
1059 reg = <0x37>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1060 ti,mode = /bits/ 8 <1>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1061 };
1062
1063 power-sensor@40 {
1064 compatible = "ti,ina230";
1065 reg = <0x40>;
1066 };
1067
1068 power-sensor@41 {
1069 compatible = "ti,ina230";
1070 reg = <0x41>;
1071 };
1072
1073 power-sensor@42 {
1074 compatible = "ti,ina230";
1075 reg = <0x42>;
1076 };
1077
1078 power-sensor@43 {
1079 compatible = "ti,ina230";
1080 reg = <0x43>;
1081 };
1082
1083 power-sensor@44 {
1084 compatible = "ti,ina230";
1085 reg = <0x44>;
1086 };
1087
1088 temperature-sensor@4e {
1089 compatible = "ti,tmp75";
1090 reg = <0x4e>;
1091 };
1092
1093 temperature-sensor@4f {
1094 compatible = "ti,tmp75";
1095 reg = <0x4f>;
1096 };
1097
1098 eeprom@51 {
1099 compatible = "atmel,24c128";
1100 reg = <0x51>;
1101 };
1102
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1103 i2c-mux@73 {
1104 compatible = "nxp,pca9544";
1105 reg = <0x73>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1106 #address-cells = <1>;
1107 #size-cells = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1108 i2c-mux-idle-disconnect;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1109
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1110 imux32: i2c@0 {
1111 reg = <0>;
1112 #address-cells = <1>;
1113 #size-cells = <0>;
1114 adc@35 {
1115 compatible = "maxim,max11617";
1116 reg = <0x35>;
1117 };
1118 };
1119
1120 imux33: i2c@1 {
1121 reg = <1>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1122 #address-cells = <1>;
1123 #size-cells = <0>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1124 adc@35 {
1125 compatible = "maxim,max11617";
1126 reg = <0x35>;
1127 };
1128 };
1129 };
1130
1131 i2c-mux@74 {
1132 compatible = "nxp,pca9546";
1133 reg = <0x74>;
1134 #address-cells = <1>;
1135 #size-cells = <0>;
1136 i2c-mux-idle-disconnect;
1137
1138 imux30: i2c@0 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1139 reg = <0>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1140 #address-cells = <1>;
1141 #size-cells = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1142
1143 adc@1f {
1144 compatible = "ti,adc128d818";
1145 reg = <0x1f>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1146 ti,mode = /bits/ 8 <1>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1147 };
1148
1149 pwm@20{
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1150 compatible = "maxim,max31790";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1151 reg = <0x20>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1152 };
1153
1154 gpio@22{
1155 compatible = "ti,tca6424";
1156 reg = <0x22>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1157 gpio-controller;
1158 #gpio-cells = <2>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1159 };
1160
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1161 pwm@2f{
1162 compatible = "maxim,max31790";
1163 reg = <0x2f>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1164 };
1165
1166 adc@33 {
1167 compatible = "maxim,max11615";
1168 reg = <0x33>;
1169 };
1170
1171 eeprom@52 {
1172 compatible = "atmel,24c128";
1173 reg = <0x52>;
1174 };
1175
1176 gpio@61 {
1177 compatible = "nxp,pca9552";
1178 reg = <0x61>;
1179 #address-cells = <1>;
1180 #size-cells = <0>;
1181 gpio-controller;
1182 #gpio-cells = <2>;
1183 };
1184 };
1185
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1186 imux31: i2c@1 {
1187 reg = <1>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1188 #address-cells = <1>;
1189 #size-cells = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1190
1191 adc@1f {
1192 compatible = "ti,adc128d818";
1193 reg = <0x1f>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1194 ti,mode = /bits/ 8 <1>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1195 };
1196
1197 pwm@20{
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1198 compatible = "maxim,max31790";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1199 reg = <0x20>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1200 };
1201
1202 gpio@22{
1203 compatible = "ti,tca6424";
1204 reg = <0x22>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1205 gpio-controller;
1206 #gpio-cells = <2>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1207 };
1208
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1209 pwm@2f{
1210 compatible = "maxim,max31790";
1211 reg = <0x2f>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1212 };
1213
1214 adc@33 {
1215 compatible = "maxim,max11615";
1216 reg = <0x33>;
1217 };
1218
1219 eeprom@52 {
1220 compatible = "atmel,24c128";
1221 reg = <0x52>;
1222 };
1223
1224 gpio@61 {
1225 compatible = "nxp,pca9552";
1226 reg = <0x61>;
1227 #address-cells = <1>;
1228 #size-cells = <0>;
1229 gpio-controller;
1230 #gpio-cells = <2>;
1231 };
1232 };
1233 };
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1234};
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1235
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1236&i2c15 {
1237 #address-cells = <1>;
1238 #size-cells = <0>;
1239 status = "okay";
1240 multi-master;
1241 bus-frequency = <400000>;
1242
1243 mctp@10 {
1244 compatible = "mctp-i2c-controller";
1245 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
1246 };
1247
1248 i2c-mux@72 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1249 compatible = "nxp,pca9544";
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1250 reg = <0x72>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1251 #address-cells = <1>;
1252 #size-cells = <0>;
1253
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1254 imux24: i2c@0 {
1255 reg = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1256 #address-cells = <1>;
1257 #size-cells = <0>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1258 mctp-controller;
1259 temperature-sensor@1f {
1260 compatible = "ti,tmp421";
1261 reg = <0x1f>;
1262 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1263
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1264 eeprom@50 {
1265 compatible = "atmel,24c64";
1266 reg = <0x50>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1267 };
1268 };
1269
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1270 imux25: i2c@1 {
1271 reg = <1>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1272 #address-cells = <1>;
1273 #size-cells = <0>;
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1274 mctp-controller;
1275 temperature-sensor@1f {
1276 compatible = "ti,tmp421";
1277 reg = <0x1f>;
1278 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1279
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1280 eeprom@50 {
1281 compatible = "atmel,24c64";
1282 reg = <0x50>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1283 };
1284 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1285
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1286 imux26: i2c@2 {
1287 reg = <2>;
1288 #address-cells = <1>;
1289 #size-cells = <0>;
1290 mctp-controller;
1291 temperature-sensor@1f {
1292 compatible = "ti,tmp421";
1293 reg = <0x1f>;
1294 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1295
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1296 eeprom@50 {
1297 compatible = "atmel,24c64";
1298 reg = <0x50>;
1299 };
1300 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1301
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1302 imux27: i2c@3 {
1303 reg = <3>;
1304 #address-cells = <1>;
1305 #size-cells = <0>;
1306 mctp-controller;
1307 temperature-sensor@1f {
1308 compatible = "ti,tmp421";
1309 reg = <0x1f>;
1310 };
1311
1312 eeprom@50 {
1313 compatible = "atmel,24c64";
1314 reg = <0x50>;
1315 };
1316 };
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1317 };
1318};
1319
1320&adc0 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1321 status = "okay";
1322 pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
1323 &pinctrl_adc2_default &pinctrl_adc3_default
1324 &pinctrl_adc4_default &pinctrl_adc5_default
1325 &pinctrl_adc6_default &pinctrl_adc7_default>;
1326};
1327
1328&adc1 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1329 status = "okay";
Tom Riniab06a532025-04-02 08:31:19 -0600[diff] [blame^]1330 pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
1331 &pinctrl_adc15_default>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1332};
1333
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1334&ehci0 {
1335 status = "okay";
1336};
1337
1338&ehci1 {
1339 status = "okay";
1340};
1341
1342&uhci {
1343 status = "okay";
1344};