| Pali Rohár | aaed328 | 2022-05-06 11:05:14 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | |
| 3 | #include <config.h> |
| 4 | #include <linux/linkage.h> |
| 5 | |
| 6 | ENTRY(arch_very_early_init) |
| 7 | #ifdef CONFIG_ARMADA_38X |
| 8 | /* |
| 9 | * Only with disabled MMU its possible to switch the base |
| 10 | * register address on Armada 38x. Without this the SDRAM |
| 11 | * located at >= 0x4000.0000 is also not accessible, as its |
| 12 | * still locked to cache. |
| 13 | */ |
| 14 | mrc p15, 0, r0, c1, c0, 0 |
| 15 | bic r0, #1 |
| 16 | mcr p15, 0, r0, c1, c0, 0 |
| 17 | #endif |
| 18 | |
| 19 | /* Move internal registers from INTREG_BASE_ADDR_REG to SOC_REGS_PHY_BASE */ |
| 20 | ldr r0, =SOC_REGS_PHY_BASE |
| 21 | ldr r1, =INTREG_BASE_ADDR_REG |
| 22 | str r0, [r1] |
| 23 | add r0, r0, #0xC000 |
| 24 | mcr p15, 4, r0, c15, c0 |
| 25 | |
| 26 | bx lr |
| 27 | ENDPROC(arch_very_early_init) |