Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 3588a41b66c82a4d7c96bceedb908baf2bdb6628 / . / arch / arm / mach-mvebu / Kconfig
blob: c764439d50cf3f4c65249b3a00104739cff679d4 [file] [log] [blame]
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]1if ARCH_MVEBU
2
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]3config HAVE_MVEBU_EFUSE
4 bool
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]5
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]6config ARMADA_32BIT
7 bool
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]8 select ARCH_MISC_INIT
9 select BOARD_EARLY_INIT_F
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530[diff] [blame]10 select CPU_V7A
Stefan Roese1f1b3e92019-04-11 08:58:32 +0200[diff] [blame]11 select SPL_DM if SPL
12 select SPL_DM_SEQ_ALIAS if SPL
13 select SPL_OF_CONTROL if SPL
Tom Rinib7cc2fe2021-10-15 10:54:41 -0400[diff] [blame]14 select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese1f1b3e92019-04-11 08:58:32 +0200[diff] [blame]15 select SPL_SIMPLE_BUS if SPL
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]16 select SUPPORT_SPL
Stefan Roese85bddff2019-04-12 16:42:28 +0200[diff] [blame]17 select TRANSLATION_OFFSET
Pali Rohárc5c28df2022-04-06 16:20:20 +0200[diff] [blame]18 select SPL_SYS_NO_VECTOR_TABLE if SPL
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]19
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]20# ARMv7 SoCs...
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]21config ARMADA_375
22 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]23 select ARMADA_32BIT
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]24
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]25config ARMADA_38X
26 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]27 select ARMADA_32BIT
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]28 select HAVE_MVEBU_EFUSE
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]29
Joshua Scott4ba8e992020-11-09 10:14:08 +1300[diff] [blame]30config ARMADA_38X_HS_IMPEDANCE_THRESH
31 hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
32 depends on ARMADA_38X
33 default 0x6
34 range 0x0 0x7
35
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]36config ARMADA_XP
37 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]38 select ARMADA_32BIT
39
40# ARMv8 SoCs...
41config ARMADA_3700
42 bool
43 select ARM64
Pali Rohár70d9bee2022-02-23 14:15:45 +0100[diff] [blame]44 select HAVE_MVEBU_EFUSE
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]45
Stefan Roesecb410332016-05-25 08:13:45 +0200[diff] [blame]46# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
47config ARMADA_8K
48 bool
49 select ARM64
50
Chris Packham1d496682016-10-26 14:08:30 +1300[diff] [blame]51# Armada PLL frequency (used for NAND clock generation)
52config SYS_MVEBU_PLL_CLOCK
53 int
Chris Packhama8f845e2019-04-11 22:22:50 +1200[diff] [blame]54 default "2000000000" if ARMADA_XP || ARMADA_3700 || ARMADA_8K || ARMADA_MSYS
Chris Packham1d496682016-10-26 14:08:30 +1300[diff] [blame]55 default "1000000000" if ARMADA_38X || ARMADA_375
56
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]57# Armada XP/38x SoC types...
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]58config MV78230
59 bool
60 select ARMADA_XP
61
62config MV78260
63 bool
64 select ARMADA_XP
Simon Glass203b3ab2017-06-14 21:28:24 -0600[diff] [blame]65 imply CMD_SATA
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]66
67config MV78460
68 bool
69 select ARMADA_XP
70
Chris Packhama8f845e2019-04-11 22:22:50 +1200[diff] [blame]71config ARMADA_MSYS
72 bool
73 select ARMADA_32BIT
74
75config 98DX4251
76 bool
77 select ARMADA_MSYS
78
79config 98DX3336
80 bool
81 select ARMADA_MSYS
82
83config 98DX3236
84 bool
85 select ARMADA_MSYS
86
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]87config 88F6820
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]88 bool
89 select ARMADA_38X
90
Tom Rini40a325f2022-03-30 18:07:24 -0400[diff] [blame]91config CUSTOMER_BOARD_SUPPORT
92 bool
93
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]94choice
Stefan Roesecb410332016-05-25 08:13:45 +0200[diff] [blame]95 prompt "Armada XP/375/38x/3700/7K/8K board select"
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]96 optional
97
Stefan Roese73606402015-10-20 15:14:47 +0200[diff] [blame]98config TARGET_CLEARFOG
99 bool "Support ClearFog"
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]100 select 88F6820
Baruch Siach1c5e95d2020-01-20 14:20:13 +0200[diff] [blame]101 select BOARD_LATE_INIT
Stefan Roese73606402015-10-20 15:14:47 +0200[diff] [blame]102
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]103config TARGET_HELIOS4
104 bool "Support Helios4"
105 select 88F6820
106
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]107config TARGET_MVEBU_ARMADA_37XX
108 bool "Support Armada 37xx platforms"
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]109 select ARMADA_3700
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]110 imply SCSI
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]111
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]112config TARGET_DB_88F6720
113 bool "Support DB-88F6720 Armada 375"
114 select ARMADA_375
115
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]116config TARGET_DB_88F6820_GP
117 bool "Support DB-88F6820-GP"
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]118 select 88F6820
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]119
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]120config TARGET_DB_88F6820_AMC
121 bool "Support DB-88F6820-AMC"
122 select 88F6820
123
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]124config TARGET_TURRIS_OMNIA
125 bool "Support Turris Omnia"
126 select 88F6820
Marek Behún0f2e66a2019-05-02 16:53:37 +0200[diff] [blame]127 select BOARD_LATE_INIT
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]128 select DM_I2C
129 select I2C_MUX
130 select I2C_MUX_PCA954x
Marek Behún4c3abea2021-10-09 19:33:46 +0200[diff] [blame]131 select SPL_DRIVERS_MISC
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]132 select SPL_I2C_MUX
Marek Behúnca6095b2021-10-09 19:33:45 +0200[diff] [blame]133 select SPL_SYS_MALLOC_SIMPLE
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]134 select SYS_I2C_MVTWSI
Marek Behún5e92efe2019-05-02 16:53:32 +0200[diff] [blame]135 select ATSHA204A
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]136
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]137config TARGET_TURRIS_MOX
138 bool "Support Turris Mox"
139 select ARMADA_3700
140
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]141config TARGET_MVEBU_ARMADA_8K
142 bool "Support Armada 7k/8k platforms"
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200[diff] [blame]143 select ARMADA_8K
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]144 select BOARD_LATE_INIT
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]145 imply SCSI
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200[diff] [blame]146
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]147config TARGET_OCTEONTX2_CN913x
148 bool "Support CN913x platforms"
149 select ARMADA_8K
150 imply BOARD_EARLY_INIT_R
151 select BOARD_LATE_INIT
152 imply SCSI
153
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]154config TARGET_DB_MV784MP_GP
155 bool "Support db-mv784mp-gp"
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]156 select BOARD_ECC_SUPPORT
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]157 select MV78460
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]158
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]159config TARGET_DS414
160 bool "Support Synology DS414"
161 select MV78230
162
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]163config TARGET_MAXBCM
164 bool "Support maxbcm"
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]165 select BOARD_ECC_SUPPORT
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]166 select MV78460
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]167
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]168config TARGET_THEADORABLE
169 bool "Support theadorable Armada XP"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]170 select BOARD_LATE_INIT if USB
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]171 select MV78260
Simon Glass203b3ab2017-06-14 21:28:24 -0600[diff] [blame]172 imply CMD_SATA
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]173
Dirk Eibachfb605942017-02-22 16:07:23 +0100[diff] [blame]174config TARGET_CONTROLCENTERDC
175 bool "Support CONTROLCENTERDC"
176 select 88F6820
Tom Rini40a325f2022-03-30 18:07:24 -0400[diff] [blame]177 select CUSTOMER_BOARD_SUPPORT
Dirk Eibachfb605942017-02-22 16:07:23 +0100[diff] [blame]178
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]179config TARGET_X530
180 bool "Support Allied Telesis x530"
181 select 88F6820
182
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]183config TARGET_DB_XC3_24G4XG
184 bool "Support DB-XC3-24G4XG"
185 select 98DX3336
186
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]187config TARGET_CRS3XX_98DX3236
188 bool "Support CRS3XX-98DX3236"
Luka Kovacicb686e222019-05-07 19:35:55 +0200[diff] [blame]189 select 98DX3236
190
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]191endchoice
192
Tom Rini59180392021-08-21 13:50:13 -0400[diff] [blame]193choice
194 prompt "DDR bus width"
195 default DDR_64BIT
196 depends on ARMADA_XP
197
198config DDR_64BIT
199 bool "64bit bus width"
200
201config DDR_32BIT
202 bool "32bit bus width"
203
204endchoice
205
Tom Rini592bcd02021-08-21 13:50:15 -0400[diff] [blame]206config DDR_LOG_LEVEL
207 int "DDR training code log level"
208 depends on ARMADA_XP
209 default 0
210 range 0 3
211 help
212 Amount of information provided on error while running the DDR
213 training code. At level 0, provides an error code in a case of
214 failure, RL, WL errors and other algorithm failure. At level 1,
215 provides the D-Unit setup (SPD/Static configuration). At level 2,
216 provides the windows margin as a results of DQS centeralization.
217 At level 3, rovides the windows margin of each DQ as a results of
218 DQS centeralization.
219
Marek Behún90555af2022-02-17 13:54:42 +0100[diff] [blame]220config DDR_RESET_ON_TRAINING_FAILURE
221 bool "Reset the board on DDR training failure instead of hanging"
222 depends on ARMADA_38X || ARMADA_XP
223 help
224 If DDR training fails in SPL, reset the board instead of hanging.
225 Some boards are known to fail DDR training occasionally and an
226 immediate reset may be preferable to waiting until the board is
227 reset by watchdog (if there even is one).
228
229 Note that if booting via UART and the DDR training fails, the
230 device will still hang - it doesn't make sense to reset the board
231 in such a case.
232
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]233config BOARD_ECC_SUPPORT
234 bool
235
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]236config SYS_BOARD
237 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]238 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]239 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]240 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]241 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]242 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]243 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]244 default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]245 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]246 default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]247 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]248 default "ds414" if TARGET_DS414
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]249 default "maxbcm" if TARGET_MAXBCM
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]250 default "theadorable" if TARGET_THEADORABLE
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]251 default "a38x" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]252 default "x530" if TARGET_X530
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]253 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]254 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]255
256config SYS_CONFIG_NAME
257 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]258 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]259 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]260 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]261 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]262 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]263 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]264 default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]265 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]266 default "ds414" if TARGET_DS414
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]267 default "maxbcm" if TARGET_MAXBCM
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]268 default "theadorable" if TARGET_THEADORABLE
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]269 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]270 default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]271 default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]272 default "x530" if TARGET_X530
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]273 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]274 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]275
276config SYS_VENDOR
277 default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]278 default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]279 default "Marvell" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]280 default "Marvell" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]281 default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]282 default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]283 default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]284 default "Marvell" if TARGET_DB_XC3_24G4XG
285 default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]286 default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]287 default "kobol" if TARGET_HELIOS4
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]288 default "Synology" if TARGET_DS414
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]289 default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]290 default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]291 default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]292 default "alliedtelesis" if TARGET_X530
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]293 default "mikrotik" if TARGET_CRS3XX_98DX3236
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]294
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]295config SYS_SOC
296 default "mvebu"
297
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]298choice
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]299 prompt "Boot method"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]300 depends on SPL
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]301
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]302config MVEBU_SPL_BOOT_DEVICE_SPI
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]303 bool "SPI NOR flash"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]304 imply ENV_IS_IN_SPI_FLASH
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]305 imply SPL_DM_SPI
306 imply SPL_SPI_FLASH_SUPPORT
307 imply SPL_SPI_LOAD
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]308 imply SPL_SPI
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]309 select SPL_BOOTROM_SUPPORT
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]310
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]311config MVEBU_SPL_BOOT_DEVICE_MMC
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]312 bool "SDIO/MMC card"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]313 imply ENV_IS_IN_MMC
314 # GPIO needed for eMMC/SD card presence detection
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]315 imply SPL_DM_GPIO
316 imply SPL_DM_MMC
317 imply SPL_GPIO
318 imply SPL_LIBDISK_SUPPORT
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]319 imply SPL_MMC
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]320 select SPL_BOOTROM_SUPPORT
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]321
Baruch Siachb936a272019-05-16 13:03:58 +0300[diff] [blame]322config MVEBU_SPL_BOOT_DEVICE_SATA
323 bool "SATA"
Simon Glass081a45a2021-08-08 12:20:17 -0600[diff] [blame]324 imply SPL_SATA
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]325 imply SPL_LIBDISK_SUPPORT
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]326 select SPL_BOOTROM_SUPPORT
Baruch Siachb936a272019-05-16 13:03:58 +0300[diff] [blame]327
Baruch Siachb35c4472018-06-18 21:56:26 +0300[diff] [blame]328config MVEBU_SPL_BOOT_DEVICE_UART
329 bool "UART"
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]330 select SPL_BOOTROM_SUPPORT
Baruch Siachb35c4472018-06-18 21:56:26 +0300[diff] [blame]331
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]332endchoice
333
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]334config MVEBU_EFUSE
335 bool "Enable eFuse support"
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]336 depends on HAVE_MVEBU_EFUSE
337 help
338 Enable support for reading and writing eFuses on mvebu SoCs.
339
340config MVEBU_EFUSE_FAKE
341 bool "Fake eFuse access (dry run)"
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]342 depends on MVEBU_EFUSE
343 help
344 This enables a "dry run" mode where eFuses are not really programmed.
345 Instead the eFuse accesses are emulated by writing to and reading
346 from a memory block.
347 This is can be used for testing prog scripts.
348
349config SECURED_MODE_IMAGE
350 bool "Build image for trusted boot"
351 default false
352 depends on 88F6820
353 help
354 Build an image that employs the ARMADA SoC's trusted boot framework
355 for securely booting images.
356
357config SECURED_MODE_CSK_INDEX
358 int "Index of active CSK"
359 default 0
360 depends on SECURED_MODE_IMAGE
361
Joel Johnson28bf4ca2020-03-23 14:21:32 -0600[diff] [blame]362source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore838e49b2020-12-08 21:07:36 -0600[diff] [blame]363source "board/kobol/helios4/Kconfig"
Joel Johnson28bf4ca2020-03-23 14:21:32 -0600[diff] [blame]364
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]365endif