blob: b63792e8888cb97e780d7291c35cbc4646edc6a3 [file] [log] [blame]
Dave Gerlach3dc33f12021-04-23 11:27:42 -05001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Board specific initialization for AM642 EVM
4 *
Dave Gerlach10498d12022-03-17 12:03:44 -05005 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
Dave Gerlach3dc33f12021-04-23 11:27:42 -05006 * Keerthy <j-keerthy@ti.com>
7 *
8 */
9
10#include <common.h>
11#include <asm/io.h>
Dave Gerlach10498d12022-03-17 12:03:44 -050012#include <dm/uclass.h>
13#include <k3-ddrss.h>
Dave Gerlach3dc33f12021-04-23 11:27:42 -050014#include <spl.h>
Aswath Govindrajue910fac2021-08-04 18:42:44 +053015#include <fdt_support.h>
Lokesh Vutla01032a42021-05-06 16:44:49 +053016#include <asm/arch/hardware.h>
Lokesh Vutla01032a42021-05-06 16:44:49 +053017#include <env.h>
18
19#include "../common/board_detect.h"
20
21#define board_is_am64x_gpevm() board_ti_k3_is("AM64-GPEVM")
22#define board_is_am64x_skevm() board_ti_k3_is("AM64-SKEVM")
Dave Gerlach3dc33f12021-04-23 11:27:42 -050023
24DECLARE_GLOBAL_DATA_PTR;
25
26int board_init(void)
27{
28 return 0;
29}
30
31int dram_init(void)
32{
Dave Gerlach88107fe2022-03-17 12:03:40 -050033 s32 ret;
Dave Gerlach3dc33f12021-04-23 11:27:42 -050034
Dave Gerlach88107fe2022-03-17 12:03:40 -050035 ret = fdtdec_setup_mem_size_base();
36 if (ret)
37 printf("Error setting up mem size and base. %d\n", ret);
38
39 return ret;
Dave Gerlach3dc33f12021-04-23 11:27:42 -050040}
41
42int dram_init_banksize(void)
43{
Dave Gerlach88107fe2022-03-17 12:03:40 -050044 s32 ret;
45
46 ret = fdtdec_setup_memory_banksize();
47 if (ret)
48 printf("Error setting up memory banksize. %d\n", ret);
Dave Gerlach3dc33f12021-04-23 11:27:42 -050049
Dave Gerlach88107fe2022-03-17 12:03:40 -050050 return ret;
Dave Gerlach3dc33f12021-04-23 11:27:42 -050051}
52
53#if defined(CONFIG_SPL_LOAD_FIT)
54int board_fit_config_name_match(const char *name)
55{
Lokesh Vutla8af2b692021-05-06 16:44:51 +053056 bool eeprom_read = board_ti_was_eeprom_read();
57
58 if (!eeprom_read || board_is_am64x_gpevm()) {
59 if (!strcmp(name, "k3-am642-r5-evm") || !strcmp(name, "k3-am642-evm"))
60 return 0;
61 } else if (board_is_am64x_skevm()) {
62 if (!strcmp(name, "k3-am642-r5-sk") || !strcmp(name, "k3-am642-sk"))
63 return 0;
64 }
Dave Gerlach3dc33f12021-04-23 11:27:42 -050065
66 return -1;
67}
68#endif
Lokesh Vutla01032a42021-05-06 16:44:49 +053069
Dave Gerlach10498d12022-03-17 12:03:44 -050070#if defined(CONFIG_SPL_BUILD)
71#if CONFIG_IS_ENABLED(USB_STORAGE)
Aswath Govindrajue910fac2021-08-04 18:42:44 +053072static int fixup_usb_boot(const void *fdt_blob)
73{
74 int ret = 0;
75
76 switch (spl_boot_device()) {
77 case BOOT_DEVICE_USB:
78 /*
79 * If the boot mode is host, fixup the dr_mode to host
80 * before cdns3 bind takes place
81 */
82 ret = fdt_find_and_setprop((void *)fdt_blob,
83 "/bus@f4000/cdns-usb@f900000/usb@f400000",
84 "dr_mode", "host", 5, 0);
85 if (ret)
86 printf("%s: fdt_find_and_setprop() failed:%d\n",
87 __func__, ret);
88 fallthrough;
89 default:
90 break;
91 }
92
93 return ret;
94}
Dave Gerlach10498d12022-03-17 12:03:44 -050095#endif
96
97#if defined(CONFIG_K3_AM64_DDRSS)
98static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
99{
100 struct udevice *dev;
101 int ret;
102
103 dram_init_banksize();
104
105 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
106 if (ret)
107 panic("Cannot get RAM device for ddr size fixup: %d\n", ret);
108
109 ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
110 if (ret)
111 printf("Error fixing up ddr node for ECC use! %d\n", ret);
112}
113#else
114static void fixup_memory_node(struct spl_image_info *spl_image)
115{
116 u64 start[CONFIG_NR_DRAM_BANKS];
117 u64 size[CONFIG_NR_DRAM_BANKS];
118 int bank;
119 int ret;
120
121 dram_init();
122 dram_init_banksize();
123
124 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
125 start[bank] = gd->bd->bi_dram[bank].start;
126 size[bank] = gd->bd->bi_dram[bank].size;
127 }
128
129 /* dram_init functions use SPL fdt, and we must fixup u-boot fdt */
130 ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, CONFIG_NR_DRAM_BANKS);
131 if (ret)
132 printf("Error fixing up memory node! %d\n", ret);
133}
134#endif
Aswath Govindrajue910fac2021-08-04 18:42:44 +0530135
136void spl_perform_fixups(struct spl_image_info *spl_image)
137{
Dave Gerlach10498d12022-03-17 12:03:44 -0500138#if defined(CONFIG_K3_AM64_DDRSS)
139 fixup_ddr_driver_for_ecc(spl_image);
140#else
141 fixup_memory_node(spl_image);
142#endif
143
144#if CONFIG_IS_ENABLED(USB_STORAGE)
Aswath Govindrajue910fac2021-08-04 18:42:44 +0530145 fixup_usb_boot(spl_image->fdt_addr);
Dave Gerlach10498d12022-03-17 12:03:44 -0500146#endif
Aswath Govindrajue910fac2021-08-04 18:42:44 +0530147}
148#endif
149
Lokesh Vutla01032a42021-05-06 16:44:49 +0530150#ifdef CONFIG_TI_I2C_BOARD_DETECT
151int do_board_detect(void)
152{
153 int ret;
154
155 ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
156 CONFIG_EEPROM_CHIP_ADDRESS);
157 if (ret) {
158 printf("EEPROM not available at 0x%02x, trying to read at 0x%02x\n",
159 CONFIG_EEPROM_CHIP_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS + 1);
160 ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
161 CONFIG_EEPROM_CHIP_ADDRESS + 1);
162 if (ret)
163 pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
164 CONFIG_EEPROM_CHIP_ADDRESS + 1, ret);
165 }
166
167 return ret;
168}
169
170int checkboard(void)
171{
172 struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
173
174 if (!do_board_detect())
175 printf("Board: %s rev %s\n", ep->name, ep->version);
176
177 return 0;
178}
179
180#ifdef CONFIG_BOARD_LATE_INIT
181static void setup_board_eeprom_env(void)
182{
183 char *name = "am64x_gpevm";
184
185 if (do_board_detect())
186 goto invalid_eeprom;
187
188 if (board_is_am64x_gpevm())
189 name = "am64x_gpevm";
190 else if (board_is_am64x_skevm())
191 name = "am64x_skevm";
192 else
193 printf("Unidentified board claims %s in eeprom header\n",
194 board_ti_get_name());
195
196invalid_eeprom:
197 set_board_info_env_am6(name);
198}
199
200static void setup_serial(void)
201{
202 struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
203 unsigned long board_serial;
204 char *endp;
205 char serial_string[17] = { 0 };
206
207 if (env_get("serial#"))
208 return;
209
Simon Glass3ff49ec2021-07-24 09:03:29 -0600210 board_serial = hextoul(ep->serial, &endp);
Lokesh Vutla01032a42021-05-06 16:44:49 +0530211 if (*endp != '\0') {
212 pr_err("Error: Can't set serial# to %s\n", ep->serial);
213 return;
214 }
215
216 snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
217 env_set("serial#", serial_string);
218}
219#endif
220#endif
221
222#ifdef CONFIG_BOARD_LATE_INIT
223int board_late_init(void)
224{
225 if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
Vignesh Raghavendra3349e212021-05-10 23:44:22 +0530226 struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
227
Lokesh Vutla01032a42021-05-06 16:44:49 +0530228 setup_board_eeprom_env();
229 setup_serial();
Vignesh Raghavendra3349e212021-05-10 23:44:22 +0530230 /*
231 * The first MAC address for ethernet a.k.a. ethernet0 comes from
232 * efuse populated via the am654 gigabit eth switch subsystem driver.
233 * All the other ones are populated via EEPROM, hence continue with
234 * an index of 1.
235 */
236 board_ti_am6_set_ethaddr(1, ep->mac_addr_cnt);
Lokesh Vutla01032a42021-05-06 16:44:49 +0530237 }
238
239 return 0;
240}
241#endif
Aswath Govindrajucb962f92021-06-04 22:00:34 +0530242
243#define CTRLMMR_USB0_PHY_CTRL 0x43004008
244#define CORE_VOLTAGE 0x80000000
245
246#ifdef CONFIG_SPL_BOARD_INIT
247void spl_board_init(void)
248{
249 u32 val;
250 /* Set USB PHY core voltage to 0.85V */
251 val = readl(CTRLMMR_USB0_PHY_CTRL);
252 val &= ~(CORE_VOLTAGE);
253 writel(val, CTRLMMR_USB0_PHY_CTRL);
Vignesh Raghavendradfcda512021-12-24 12:55:31 +0530254
255 /* Init DRAM size for R5/A53 SPL */
256 dram_init_banksize();
Aswath Govindrajucb962f92021-06-04 22:00:34 +0530257}
258#endif