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git01.mediatek.com / filogic / uboot / aa6b9e703b070c19c52596c8c3f0e1254873e87f / . / configs / socfpga_arria5_defconfig
blob: 1bec9696fa692e3ed9c0306c5a8b843b5e94ed83 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
Masahiro Yamada144a3e02015-04-21 20:38:20 +0900[diff] [blame]2CONFIG_ARCH_SOCFPGA=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]3CONFIG_SYS_MALLOC_F_LEN=0x2000
Marek Vasut78a3b7d2016-05-30 17:09:48 +0200[diff] [blame]4CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]5CONFIG_SPL_DM=y
6CONFIG_DM_GPIO=y
Marek Vasut822e7952015-08-02 21:57:57 +0200[diff] [blame]7CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]8CONFIG_SPL_STACK_R_ADDR=0x00800000
Marek Vasuta3fb96c2014-12-30 21:08:57 +0100[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]10CONFIG_SPL=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]11CONFIG_SPL_STACK_R=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]12CONFIG_FIT=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]13CONFIG_HUSH_PARSER=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]14CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]15# CONFIG_CMD_IMLS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]16CONFIG_CMD_ASKENV=y
17CONFIG_CMD_GREPENV=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]18# CONFIG_CMD_FLASH is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]19CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]20CONFIG_CMD_SF=y
21CONFIG_CMD_SPI=y
22CONFIG_CMD_I2C=y
23CONFIG_CMD_USB=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]24CONFIG_CMD_DFU=y
25CONFIG_CMD_USB_MASS_STORAGE=y
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]26CONFIG_CMD_GPIO=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]27CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]28CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]29CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]30CONFIG_CMD_CACHE=y
31CONFIG_CMD_EXT4=y
32CONFIG_CMD_EXT4_WRITE=y
33CONFIG_CMD_FAT=y
34CONFIG_CMD_FS_GENERIC=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]35CONFIG_SPL_DM_SEQ_ALIAS=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]36CONFIG_DWAPB_GPIO=y
Stefan Roese78077b62016-04-28 09:47:18 +0200[diff] [blame]37CONFIG_SYS_I2C_DW=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]38CONFIG_DM_MMC=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]39CONFIG_SPI_FLASH=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]40CONFIG_SPI_FLASH_BAR=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]41CONFIG_SPI_FLASH_SPANSION=y
42CONFIG_SPI_FLASH_STMICRO=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]43# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Marek Vasutbac88952015-08-19 07:44:39 +0200[diff] [blame]44CONFIG_DM_ETH=y
Marek Vasutbac88952015-08-19 07:44:39 +0200[diff] [blame]45CONFIG_ETH_DESIGNWARE=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]46CONFIG_SYS_NS16550=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]47CONFIG_CADENCE_QSPI=y
48CONFIG_DESIGNWARE_SPI=y
Marek Vasut52e8aa22015-12-05 19:24:22 +0100[diff] [blame]49CONFIG_USB=y
50CONFIG_DM_USB=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]51CONFIG_USB_GADGET=y
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]52CONFIG_USB_GADGET_DWC2_OTG=y
Sam Protsenko4d2439d2016-04-13 14:20:26 +0300[diff] [blame]53CONFIG_USB_GADGET_DOWNLOAD=y
Sam Protsenkob706ffd2016-04-13 14:20:30 +0300[diff] [blame]54CONFIG_G_DNL_MANUFACTURER="altera"
55CONFIG_G_DNL_VENDOR_NUM=0x0525
56CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]57CONFIG_USE_TINY_PRINTF=y