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git01.mediatek.com / filogic / uboot / aa02ec091b5f767ae110f144720b6d6f488f8381 / . / board / xilinx / zynqmp / zynqmp-zcu100-revC / psu_init_gpl.c
blob: e01915f7ed9e92416f98b9ddfa725649e8fe28f2 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Michal Simeka057d222018-03-28 14:37:47 +0200[diff] [blame]2/*
3 * (c) Copyright 2015 Xilinx, Inc. All rights reserved.
Michal Simeka057d222018-03-28 14:37:47 +0200[diff] [blame]4 */
5
6#include <asm/arch/psu_init_gpl.h>
7#include <xil_io.h>
8
9static unsigned long psu_pll_init_data(void)
10{
11 psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
12 psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
13 psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
14 psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
15 psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
16 mask_poll(0xFF5E0040, 0x00000002U);
17 psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
18 psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
19 psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x00000000U);
20 psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
21 psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
22 psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
23 psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
24 psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
25 mask_poll(0xFF5E0040, 0x00000001U);
26 psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
27 psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
28 psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
29 psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
30 psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
31 psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
32 psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
33 psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
34 mask_poll(0xFD1A0044, 0x00000001U);
35 psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
36 psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
37 psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
38 psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
39 psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
40 psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
41 psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
42 psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
43 mask_poll(0xFD1A0044, 0x00000002U);
44 psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
45 psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
46 psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
47 psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U);
48 psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U);
49 psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
50 psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
51 psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
52 mask_poll(0xFD1A0044, 0x00000004U);
53 psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
54 psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
55 psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x00000000U);
56
57 return 1;
58}
59
60static unsigned long psu_clock_init_data(void)
61{
62 psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
63 psu_mask_write(0xFF5E0064, 0x023F3F07U, 0x02010600U);
64 psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x020F0500U);
65 psu_mask_write(0xFF5E006C, 0x013F3F07U, 0x01010800U);
66 psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U);
67 psu_mask_write(0xFF18030C, 0x00020003U, 0x00000000U);
68 psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
69 psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
70 psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
71 psu_mask_write(0xFF5E007C, 0x013F3F07U, 0x01010800U);
72 psu_mask_write(0xFF5E0080, 0x013F3F07U, 0x01010800U);
73 psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
74 psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
75 psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
76 psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
77 psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
78 psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
79 psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
80 psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
81 psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
82 psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U);
83 psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U);
84 psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
85 psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
86 psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
87 psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010400U);
88 psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U);
89 psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U);
90 psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
91 psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
92 psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000400U);
93 psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
94 psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
95 psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
96 psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U);
97 psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
98 psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
99 psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
100 psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
101 psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
102 psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
103
104 return 1;
105}
106
107static unsigned long psu_ddr_init_data(void)
108{
109 psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
110 psu_mask_write(0xFD070000, 0xE30FBE3DU, 0xC3081020U);
111 psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
112 psu_mask_write(0xFD070020, 0x000003F3U, 0x00000102U);
113 psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x0028B090U);
114 psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
115 psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00404310U);
116 psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
117 psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
118 psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
119 psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x00208030U);
120 psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
121 psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
122 psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
123 psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0030051FU);
124 psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x0002020AU);
125 psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00360000U);
126 psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00001205U);
127 psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x00240012U);
128 psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00310008U);
129 psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
130 psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x00000000U);
131 psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x00000000U);
132 psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
133 psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000077FU);
134 psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x0E0B010CU);
135 psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00030412U);
136 psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x04070F0DU);
137 psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x00A05000U);
138 psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x05040306U);
139 psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x01020404U);
140 psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
141 psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000201U);
142 psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030303U);
143 psu_mask_write(0xFD070124, 0x40070F3FU, 0x0004040DU);
144 psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x440C011CU);
145 psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
146 psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x810B0008U);
147 psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x00E32DCBU);
148 psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B8206U);
149 psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
150 psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
151 psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
152 psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
153 psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00A00070U);
154 psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000004U);
155 psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000901U);
156 psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
157 psu_mask_write(0xFD070200, 0x0000001FU, 0x00000015U);
158 psu_mask_write(0xFD070204, 0x001F1F1FU, 0x00070707U);
159 psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
160 psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x0F000000U);
161 psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
162 psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x060F0606U);
163 psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F060606U);
164 psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
165 psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000000U);
166 psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x06060606U);
167 psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x06060606U);
168 psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000006U);
169 psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x04000400U);
170 psu_mask_write(0xFD070244, 0x00003333U, 0x00000000U);
171 psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
172 psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
173 psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
174 psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
175 psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
176 psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
177 psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
178 psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
179 psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
180 psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
181 psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
182 psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
183 psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
184 psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
185 psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
186 psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
187 psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
188 psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
189 psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
190 psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
191 psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
192 psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
193 psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
194 psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
195 psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
196 psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
197 psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
198 psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
199 psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
200 psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
201 psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
202 psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
203 psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
204 psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
205 psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
206 psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
207 psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
208 psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
209 psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
210 psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
211 psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
212 psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
213 psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
214 psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
215 psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
216 psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
217 psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
218 psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
219 psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
220 psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
221 psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
222 psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
223 psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
224 psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
225 psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
226 psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x87001E00U);
227 psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F03D28U);
228 psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
229 psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
230 psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x85642AD0U);
231 psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xA0AA0580U);
232 psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x05102000U);
233 psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A040A1U);
234 psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U);
235 psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0000040DU);
236 psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06180C08U);
237 psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x2816050AU);
238 psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00080064U);
239 psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x82000501U);
240 psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x00602B08U);
241 psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00231008U);
242 psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x0000080EU);
243 psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
244 psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
245 psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
246 psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000000U);
247 psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000000U);
248 psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000024U);
249 psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000012U);
250 psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000031U);
251 psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000008U);
252 psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x00000000U);
253 psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000000U);
254 psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000056U);
255 psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x00000021U);
256 psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
257 psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x00000019U);
258 psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000016U);
259 psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x810091C7U);
260 psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00030236U);
261 psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
262 psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
263 psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12340800U);
264 psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x0000000AU);
265 psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
266 psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x00000000U);
267 psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000005U);
268 psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x00000000U);
269 psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300BD99U);
270 psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF1032019U);
271 psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
272 psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
273 psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
274 psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
275 psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
276 psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
277 psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
278 psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x00894C58U);
279 psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x0001B39BU);
280 psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
281 psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
282 psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x0001BB9BU);
283 psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
284 psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00F50CU);
285 psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09091616U);
286 psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
287 psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
288 psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00F50CU);
289 psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09091616U);
290 psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
291 psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
292 psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
293 psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00F50CU);
294 psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09091616U);
295 psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
296 psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
297 psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
298 psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00F50CU);
299 psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09091616U);
300 psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
301 psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
302 psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007F00U);
303 psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00BD0CU);
304 psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09091616U);
305 psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
306 psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
307 psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007F00U);
308 psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00BD0CU);
309 psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09091616U);
310 psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
311 psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
312 psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007F00U);
313 psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00BD0CU);
314 psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09091616U);
315 psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
316 psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
317 psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007F00U);
318 psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00BD0CU);
319 psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09091616U);
320 psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
321 psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
322 psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
323 psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00BD0CU);
324 psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09091616U);
325 psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
326 psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
327 psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x05102000U);
328 psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
329 psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x000C1800U);
330 psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x71000000U);
331 psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
332 psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x05102000U);
333 psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
334 psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x000C1800U);
335 psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x71000000U);
336 psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
337 psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x05102000U);
338 psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
339 psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x000C1800U);
340 psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x71000000U);
341 psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
342 psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x05102000U);
343 psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
344 psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x000C1800U);
345 psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x71000000U);
346 psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
347 psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x05102000U);
348 psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
349 psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x000C1800U);
350 psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x71000000U);
351 psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x05102000U);
352 psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
353
354 return 1;
355}
356
357static unsigned long psu_ddr_qos_init_data(void)
358{
359 psu_mask_write(0xFD090000, 0x0000FFFFU, 0x00000845U);
360 psu_mask_write(0xFD090004, 0x002DB5ADU, 0x002DB5ADU);
361 psu_mask_write(0xFD090800, 0xFFFFFFFFU, 0x00000001U);
362 psu_mask_write(0xFD09000C, 0x0000007FU, 0x00000010U);
363 psu_mask_write(0xFD090010, 0x0000007FU, 0x00000010U);
364 psu_mask_write(0xFD380008, 0x0000000FU, 0x00000007U);
365 psu_mask_write(0xFD38001C, 0x0000000FU, 0x0000000FU);
366 psu_mask_write(0xFD390008, 0x0000000FU, 0x00000003U);
367 psu_mask_write(0xFD39001C, 0x0000000FU, 0x00000003U);
368 psu_mask_write(0xFD3A0008, 0x0000000FU, 0x00000003U);
369 psu_mask_write(0xFD3A001C, 0x0000000FU, 0x00000003U);
370 psu_mask_write(0xFD3B0008, 0x0000000FU, 0x00000003U);
371 psu_mask_write(0xFD3B001C, 0x0000000FU, 0x00000003U);
372
373 return 1;
374}
375
376static unsigned long psu_mio_init_data(void)
377{
378 psu_mask_write(0xFF180000, 0x000000FEU, 0x000000C0U);
379 psu_mask_write(0xFF180004, 0x000000FEU, 0x000000C0U);
380 psu_mask_write(0xFF180008, 0x000000FEU, 0x000000C0U);
381 psu_mask_write(0xFF18000C, 0x000000FEU, 0x000000C0U);
382 psu_mask_write(0xFF180010, 0x000000FEU, 0x00000040U);
383 psu_mask_write(0xFF180014, 0x000000FEU, 0x00000040U);
384 psu_mask_write(0xFF180018, 0x000000FEU, 0x00000080U);
385 psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000000U);
386 psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U);
387 psu_mask_write(0xFF180024, 0x000000FEU, 0x00000080U);
388 psu_mask_write(0xFF180028, 0x000000FEU, 0x00000080U);
389 psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000080U);
390 psu_mask_write(0xFF180030, 0x000000FEU, 0x00000000U);
391 psu_mask_write(0xFF180034, 0x000000FEU, 0x00000008U);
392 psu_mask_write(0xFF180038, 0x000000FEU, 0x00000008U);
393 psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000008U);
394 psu_mask_write(0xFF180040, 0x000000FEU, 0x00000008U);
395 psu_mask_write(0xFF180044, 0x000000FEU, 0x00000000U);
396 psu_mask_write(0xFF180048, 0x000000FEU, 0x00000000U);
397 psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000000U);
398 psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U);
399 psu_mask_write(0xFF180054, 0x000000FEU, 0x00000008U);
400 psu_mask_write(0xFF180058, 0x000000FEU, 0x00000008U);
401 psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U);
402 psu_mask_write(0xFF180060, 0x000000FEU, 0x00000008U);
403 psu_mask_write(0xFF180064, 0x000000FEU, 0x00000000U);
404 psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U);
405 psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U);
406 psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U);
407 psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U);
408 psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U);
409 psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U);
410 psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U);
411 psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U);
Michal Simeka057d222018-03-28 14:37:47 +0200[diff] [blame]412 psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U);
413 psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U);
414 psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U);
415 psu_mask_write(0xFF180098, 0x000000FEU, 0x00000080U);
416 psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000000U);
417 psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000000U);
418 psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000080U);
419 psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000080U);
420 psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000080U);
421 psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U);
422 psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000000U);
423 psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U);
424 psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U);
425 psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U);
426 psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U);
427 psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U);
428 psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U);
429 psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U);
430 psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U);
431 psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U);
432 psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U);
433 psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U);
434 psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U);
435 psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U);
436 psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U);
437 psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U);
438 psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U);
439 psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U);
440 psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U);
441 psu_mask_write(0xFF180100, 0x000000FEU, 0x00000004U);
442 psu_mask_write(0xFF180104, 0x000000FEU, 0x00000004U);
443 psu_mask_write(0xFF180108, 0x000000FEU, 0x00000004U);
444 psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000004U);
445 psu_mask_write(0xFF180110, 0x000000FEU, 0x00000004U);
446 psu_mask_write(0xFF180114, 0x000000FEU, 0x00000004U);
447 psu_mask_write(0xFF180118, 0x000000FEU, 0x00000004U);
448 psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000004U);
449 psu_mask_write(0xFF180120, 0x000000FEU, 0x00000004U);
450 psu_mask_write(0xFF180124, 0x000000FEU, 0x00000004U);
451 psu_mask_write(0xFF180128, 0x000000FEU, 0x00000004U);
452 psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000004U);
453 psu_mask_write(0xFF180130, 0x000000FEU, 0x00000000U);
454 psu_mask_write(0xFF180134, 0x000000FEU, 0x00000000U);
455 psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x51000006U);
456 psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B00000U);
457 psu_mask_write(0xFF18020C, 0x00003FFFU, 0x0000000BU);
458 psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x039E1FFFU);
459 psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
460 psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
461 psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
462 psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
463 psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
464 psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
465 psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
466 psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
467 psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
468 psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
469 psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
470 psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
471 psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
472 psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
473 psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
474 psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
475 psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
476 psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
477
478 return 1;
479}
480
481static unsigned long psu_peripherals_init_data(void)
482{
Michal Simek3e7a5272018-04-19 14:41:11 +0200[diff] [blame]483 psu_mask_write(0xFD1A0100, 0x0001807CU, 0x00000000U);
Michal Simeka057d222018-03-28 14:37:47 +0200[diff] [blame]484 psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
485 psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
486 psu_mask_write(0xFF5E023C, 0x00000FC0U, 0x00000000U);
487 psu_mask_write(0xFF5E0238, 0x00000060U, 0x00000000U);
488 psu_mask_write(0xFF180310, 0x00008001U, 0x00000000U);
489 psu_mask_write(0xFF180320, 0x33803380U, 0x00800080U);
490 psu_mask_write(0xFF18031C, 0x00007FFEU, 0x00006450U);
491 psu_mask_write(0xFF180358, 0x00080000U, 0x00080000U);
492 psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U);
493 psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U);
494 psu_mask_write(0xFF180324, 0x000003C0U, 0x00000000U);
495 psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
496 psu_mask_write(0xFF5E0238, 0x00000400U, 0x00000000U);
497 psu_mask_write(0xFF5E0238, 0x00000018U, 0x00000000U);
498 psu_mask_write(0xFF5E0238, 0x00000800U, 0x00000000U);
499 psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
500 psu_mask_write(0xFD4AB120, 0x00000007U, 0x00000007U);
Michal Simeka057d222018-03-28 14:37:47 +0200[diff] [blame]501 psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
502 psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
503 psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
504 psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
505 psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
506 psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD17U);
507 psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
508
509 return 1;
510}
511
512static unsigned long psu_serdes_init_data(void)
513{
514 psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U);
515 psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
516 psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U);
517 psu_mask_write(0xFD41000C, 0x0000001FU, 0x00000008U);
518 psu_mask_write(0xFD402860, 0x00000082U, 0x00000002U);
519 psu_mask_write(0xFD402864, 0x00000080U, 0x00000080U);
520 psu_mask_write(0xFD402868, 0x00000081U, 0x00000001U);
521 psu_mask_write(0xFD40286C, 0x00000081U, 0x00000001U);
522 psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U);
523 psu_mask_write(0xFD40E094, 0x00000010U, 0x00000010U);
524 psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U);
525 psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U);
526 psu_mask_write(0xFD40E368, 0x000000FFU, 0x00000038U);
527 psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U);
528 psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U);
529 psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U);
530 psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
531 psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
532 psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU);
533 psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U);
534 psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U);
535 psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U);
536 psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
537 psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
538 psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
539 psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
540 psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U);
541 psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U);
542 psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U);
543 psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U);
544 psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000F4U);
545 psu_mask_write(0xFD40E374, 0x000000FFU, 0x00000031U);
546 psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000002U);
547 psu_mask_write(0xFD40E37C, 0x00000033U, 0x00000030U);
548 psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U);
549 psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U);
550 psu_mask_write(0xFD40D06C, 0x00000003U, 0x00000003U);
551 psu_mask_write(0xFD40C0F4, 0x00000003U, 0x00000003U);
552 psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U);
553 psu_mask_write(0xFD40D0CC, 0x00000020U, 0x00000020U);
554 psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
555 psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
556 psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
557 psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
558 psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
559 psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
560 psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U);
561 psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU);
562 psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU);
563 psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U);
564 psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU);
565 psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U);
566 psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU);
567 psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U);
568 psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU);
569 psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U);
570 psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U);
571 psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U);
572 psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U);
573 psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
574 psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U);
575 psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000001AU);
576 psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000001AU);
577 psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000010U);
578 psu_mask_write(0xFD40D924, 0x000000FFU, 0x000000FEU);
579 psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000000U);
580 psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000001AU);
581 psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000000U);
582 psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU);
583 psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U);
584 psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U);
585 psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U);
586 psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U);
587 psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
588 psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
589 psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
590 psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
591 psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
592 psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
593 psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
594 psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
595 psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
596 psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
597 psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
598 psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
599 psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
600 psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
601 psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
602 psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
603 psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
604 psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
605 psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
606 psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
607 psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
608 psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U);
609 psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U);
610 psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
611 psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
612 psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U);
613 psu_mask_write(0xFD410014, 0x00000077U, 0x00000033U);
614 psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U);
615 psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
616 psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U);
617 psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
618 psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
619 psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U);
620 psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
621 psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U);
622
623 return 1;
624}
625
626static unsigned long psu_resetout_init_data(void)
627{
628 psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
629 psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U);
630 psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U);
631 psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U);
632 psu_mask_write(0xFF5E023C, 0x00000800U, 0x00000000U);
633 psu_mask_write(0xFF9E0080, 0x00000001U, 0x00000001U);
634 psu_mask_write(0xFF9E007C, 0x00000001U, 0x00000000U);
635 psu_mask_write(0xFF5E023C, 0x00000280U, 0x00000000U);
636 psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
637 psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
638 psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
639 psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U);
640 psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U);
641 psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U);
642 psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U);
643 psu_mask_write(0xFE30C200, 0x00023FFFU, 0x00022457U);
644 psu_mask_write(0xFE30C630, 0x003FFF00U, 0x00000000U);
645 psu_mask_write(0xFE30C12C, 0x00004000U, 0x00004000U);
646 psu_mask_write(0xFE30C11C, 0x00000600U, 0x00000600U);
647 psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
648 mask_poll(0xFD4063E4, 0x00000010U);
649 mask_poll(0xFD40A3E4, 0x00000010U);
650 mask_poll(0xFD40E3E4, 0x00000010U);
651
652 return 1;
653}
654
655static unsigned long psu_resetin_init_data(void)
656{
657 psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U);
658 psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000A80U);
659 psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
660 psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
661 psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
662
663 return 1;
664}
665
666static unsigned long psu_afi_config(void)
667{
668 psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
669 psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
670 psu_mask_write(0xFF419000, 0x00000300U, 0x00000000U);
671
672 return 1;
673}
674
675static unsigned long psu_ddr_phybringup_data(void)
676{
677 unsigned int regval = 0;
678 unsigned int pll_retry = 10;
679 unsigned int pll_locked = 0;
680
681 while ((pll_retry > 0) && (!pll_locked)) {
682 Xil_Out32(0xFD080004, 0x00040010);
683 Xil_Out32(0xFD080004, 0x00040011);
684
685 while ((Xil_In32(0xFD080030) & 0x1) != 1)
686 ;
687
688 pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
689 >> 31;
690 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
691 >> 16;
692 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000)
693 >> 16;
694 pll_retry--;
695 }
696 Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
697 Xil_Out32(0xFD080004U, 0x00040063U);
698 Xil_Out32(0xFD090000U, 0x00000845U);
699 Xil_Out32(0xFD090004U, 0x003FFFFFU);
700 Xil_Out32(0xFD09000CU, 0x00000010U);
701 Xil_Out32(0xFD090010U, 0x00000010U);
702 Xil_Out32(0xFD090800U, 0x00000001U);
703
704 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
705 ;
706
707 prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
708
709 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
710 ;
711
712 Xil_Out32(0xFD070010U, 0x80000038U);
713 Xil_Out32(0xFD0701B0U, 0x00000005U);
714 regval = Xil_In32(0xFD070018);
715 while ((regval & 0x1) != 0x0)
716 regval = Xil_In32(0xFD070018);
717
718 regval = Xil_In32(0xFD070018);
719 regval = Xil_In32(0xFD070018);
720 regval = Xil_In32(0xFD070018);
721 regval = Xil_In32(0xFD070018);
722 regval = Xil_In32(0xFD070018);
723 regval = Xil_In32(0xFD070018);
724 regval = Xil_In32(0xFD070018);
725 regval = Xil_In32(0xFD070018);
726 regval = Xil_In32(0xFD070018);
727 regval = Xil_In32(0xFD070018);
728 Xil_Out32(0xFD070014U, 0x00000331U);
729 Xil_Out32(0xFD070010U, 0x80000038U);
730 regval = Xil_In32(0xFD070018);
731 while ((regval & 0x1) != 0x0)
732 regval = Xil_In32(0xFD070018);
733
734 regval = Xil_In32(0xFD070018);
735 regval = Xil_In32(0xFD070018);
736 regval = Xil_In32(0xFD070018);
737 regval = Xil_In32(0xFD070018);
738 regval = Xil_In32(0xFD070018);
739 regval = Xil_In32(0xFD070018);
740 regval = Xil_In32(0xFD070018);
741 regval = Xil_In32(0xFD070018);
742 regval = Xil_In32(0xFD070018);
743 regval = Xil_In32(0xFD070018);
744 Xil_Out32(0xFD070014U, 0x00000B36U);
745 Xil_Out32(0xFD070010U, 0x80000038U);
746 regval = Xil_In32(0xFD070018);
747 while ((regval & 0x1) != 0x0)
748 regval = Xil_In32(0xFD070018);
749
750 regval = Xil_In32(0xFD070018);
751 regval = Xil_In32(0xFD070018);
752 regval = Xil_In32(0xFD070018);
753 regval = Xil_In32(0xFD070018);
754 regval = Xil_In32(0xFD070018);
755 regval = Xil_In32(0xFD070018);
756 regval = Xil_In32(0xFD070018);
757 regval = Xil_In32(0xFD070018);
758 regval = Xil_In32(0xFD070018);
759 regval = Xil_In32(0xFD070018);
760 Xil_Out32(0xFD070014U, 0x00000C21U);
761 Xil_Out32(0xFD070010U, 0x80000038U);
762 regval = Xil_In32(0xFD070018);
763 while ((regval & 0x1) != 0x0)
764 regval = Xil_In32(0xFD070018);
765
766 regval = Xil_In32(0xFD070018);
767 regval = Xil_In32(0xFD070018);
768 regval = Xil_In32(0xFD070018);
769 regval = Xil_In32(0xFD070018);
770 regval = Xil_In32(0xFD070018);
771 regval = Xil_In32(0xFD070018);
772 regval = Xil_In32(0xFD070018);
773 regval = Xil_In32(0xFD070018);
774 regval = Xil_In32(0xFD070018);
775 regval = Xil_In32(0xFD070018);
776 Xil_Out32(0xFD070014U, 0x00000E19U);
777 Xil_Out32(0xFD070010U, 0x80000038U);
778 regval = Xil_In32(0xFD070018);
779 while ((regval & 0x1) != 0x0)
780 regval = Xil_In32(0xFD070018);
781
782 regval = Xil_In32(0xFD070018);
783 regval = Xil_In32(0xFD070018);
784 regval = Xil_In32(0xFD070018);
785 regval = Xil_In32(0xFD070018);
786 regval = Xil_In32(0xFD070018);
787 regval = Xil_In32(0xFD070018);
788 regval = Xil_In32(0xFD070018);
789 regval = Xil_In32(0xFD070018);
790 regval = Xil_In32(0xFD070018);
791 regval = Xil_In32(0xFD070018);
792 Xil_Out32(0xFD070014U, 0x00001616U);
793 Xil_Out32(0xFD070010U, 0x80000038U);
794 Xil_Out32(0xFD070010U, 0x80000030U);
795 Xil_Out32(0xFD0701B0U, 0x00000005U);
796 Xil_Out32(0xFD070320U, 0x00000001U);
797 while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
798 ;
799
800 prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
801 Xil_Out32(0xFD080004, 0x0014FE01);
802
803 regval = Xil_In32(0xFD080030);
804 while (regval != 0x8000007E)
805 regval = Xil_In32(0xFD080030);
806
807 Xil_Out32(0xFD080200U, 0x010091C7U);
808 regval = Xil_In32(0xFD080030);
809 while (regval != 0x80008FFF)
810 regval = Xil_In32(0xFD080030);
811
812 Xil_Out32(0xFD080200U, 0x810091C7U);
813 Xil_Out32(0xFD070180U, 0x010B0008U);
814 Xil_Out32(0xFD070060U, 0x00000000U);
815 prog_reg(0xFD070020U, 0x00000001U, 0x00000000U, 0x00000001U);
816 prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
817
818 return 1;
819}
820
821static int serdes_enb_coarse_saturation(void)
822{
823 Xil_Out32(0xFD402094, 0x00000010);
824 Xil_Out32(0xFD406094, 0x00000010);
825 Xil_Out32(0xFD40A094, 0x00000010);
826 Xil_Out32(0xFD40E094, 0x00000010);
827 return 1;
828}
829
830static int serdes_fixcal_code(void)
831{
832 int maskstatus = 1;
833 unsigned int match_pmos_code[23];
834 unsigned int match_nmos_code[23];
835 unsigned int match_ical_code[7];
836 unsigned int match_rcal_code[7];
837 unsigned int p_code = 0;
838 unsigned int n_code = 0;
839 unsigned int i_code = 0;
840 unsigned int r_code = 0;
841 unsigned int repeat_count = 0;
842 unsigned int L3_TM_CALIB_DIG20 = 0;
843 unsigned int L3_TM_CALIB_DIG19 = 0;
844 unsigned int L3_TM_CALIB_DIG18 = 0;
845 unsigned int L3_TM_CALIB_DIG16 = 0;
846 unsigned int L3_TM_CALIB_DIG15 = 0;
847 unsigned int L3_TM_CALIB_DIG14 = 0;
848 int i = 0;
849
850 for (i = 0; i < 23; i++) {
851 match_pmos_code[i] = 0;
852 match_nmos_code[i] = 0;
853 }
854 for (i = 0; i < 7; i++) {
855 match_ical_code[i] = 0;
856 match_rcal_code[i] = 0;
857 }
858
859 do {
860 Xil_Out32(0xFD410010, 0x00000000);
861 Xil_Out32(0xFD410014, 0x00000000);
862
863 Xil_Out32(0xFD410010, 0x00000001);
864 Xil_Out32(0xFD410014, 0x00000000);
865
866 maskstatus = mask_poll(0xFD40EF14, 0x2);
867 if (maskstatus == 0) {
868 /* xil_printf("#SERDES initialization timed out\n\r");*/
869 return maskstatus;
870 }
871
872 p_code = mask_read(0xFD40EF18, 0xFFFFFFFF);
873 n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF);
874 ;
875 i_code = mask_read(0xFD40EF24, 0xFFFFFFFF);
876 r_code = mask_read(0xFD40EF28, 0xFFFFFFFF);
877 ;
878
879 if ((p_code >= 0x26) && (p_code <= 0x3C))
880 match_pmos_code[p_code - 0x26] += 1;
881
882 if ((n_code >= 0x26) && (n_code <= 0x3C))
883 match_nmos_code[n_code - 0x26] += 1;
884
885 if ((i_code >= 0xC) && (i_code <= 0x12))
886 match_ical_code[i_code - 0xC] += 1;
887
888 if ((r_code >= 0x6) && (r_code <= 0xC))
889 match_rcal_code[r_code - 0x6] += 1;
890
891 } while (repeat_count++ < 10);
892
893 for (i = 0; i < 23; i++) {
894 if (match_pmos_code[i] >= match_pmos_code[0]) {
895 match_pmos_code[0] = match_pmos_code[i];
896 p_code = 0x26 + i;
897 }
898 if (match_nmos_code[i] >= match_nmos_code[0]) {
899 match_nmos_code[0] = match_nmos_code[i];
900 n_code = 0x26 + i;
901 }
902 }
903
904 for (i = 0; i < 7; i++) {
905 if (match_ical_code[i] >= match_ical_code[0]) {
906 match_ical_code[0] = match_ical_code[i];
907 i_code = 0xC + i;
908 }
909 if (match_rcal_code[i] >= match_rcal_code[0]) {
910 match_rcal_code[0] = match_rcal_code[i];
911 r_code = 0x6 + i;
912 }
913 }
914
915 L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0);
916 L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7);
917
918 L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18);
919 L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6)
920 | 0x20 | 0x4 | ((n_code >> 3) & 0x3);
921
922 L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F);
923 L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10;
924
925 L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8);
926 L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7);
927
928 L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30);
929 L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7)
930 | 0x40 | 0x8 | ((i_code >> 1) & 0x7);
931
932 L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F);
933 L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40;
934
935 Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20);
936 Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19);
937 Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18);
938 Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16);
939 Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15);
940 Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14);
941 return maskstatus;
942}
943
944static int init_serdes(void)
945{
946 int status = 1;
947
948 status &= psu_resetin_init_data();
949
950 status &= serdes_fixcal_code();
951 status &= serdes_enb_coarse_saturation();
952
953 status &= psu_serdes_init_data();
954 status &= psu_resetout_init_data();
955
956 return status;
957}
958
959static void init_peripheral(void)
960{
961 psu_mask_write(0xFD5F0018, 0x0000001FU, 0x0000001FU);
962}
963
964int psu_init(void)
965{
966 int status = 1;
967
968 status &= psu_mio_init_data();
969 status &= psu_pll_init_data();
970 status &= psu_clock_init_data();
971 status &= psu_ddr_init_data();
972 status &= psu_ddr_phybringup_data();
973 status &= psu_peripherals_init_data();
974 status &= init_serdes();
975 init_peripheral();
976
977 status &= psu_afi_config();
978 psu_ddr_qos_init_data();
979
980 if (status == 0)
981 return 1;
982 return 0;
983}
Michal Simekef955012019-12-03 15:02:50 +0100[diff] [blame]984
985unsigned long psu_post_config_data(void)
986{
987 psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U);
988 return 0;
989}