Zhi-zhou Zhang | e0d6df5 | 2012-10-16 15:02:08 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003 |
| 3 | * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Zhi-zhou Zhang | e0d6df5 | 2012-10-16 15:02:08 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <command.h> |
Daniel Schwierzeck | ed16050 | 2015-01-29 14:56:20 +0100 | [diff] [blame] | 10 | #include <linux/compiler.h> |
Paul Burton | dc2037e | 2016-09-21 11:18:48 +0100 | [diff] [blame] | 11 | #include <asm/cache.h> |
Zhi-zhou Zhang | e0d6df5 | 2012-10-16 15:02:08 +0200 | [diff] [blame] | 12 | #include <asm/mipsregs.h> |
Zhi-zhou Zhang | e0d6df5 | 2012-10-16 15:02:08 +0200 | [diff] [blame] | 13 | #include <asm/reboot.h> |
| 14 | |
Álvaro Fernández Rojas | 2ec1f98 | 2017-04-25 00:39:15 +0200 | [diff] [blame] | 15 | #ifndef CONFIG_SYSRESET |
Daniel Schwierzeck | ed16050 | 2015-01-29 14:56:20 +0100 | [diff] [blame] | 16 | void __weak _machine_restart(void) |
Zhi-zhou Zhang | e0d6df5 | 2012-10-16 15:02:08 +0200 | [diff] [blame] | 17 | { |
| 18 | fprintf(stderr, "*** reset failed ***\n"); |
| 19 | |
| 20 | while (1) |
| 21 | /* NOP */; |
| 22 | } |
| 23 | |
| 24 | int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
| 25 | { |
| 26 | _machine_restart(); |
| 27 | |
| 28 | return 0; |
| 29 | } |
Álvaro Fernández Rojas | 2ec1f98 | 2017-04-25 00:39:15 +0200 | [diff] [blame] | 30 | #endif |
Zhi-zhou Zhang | e0d6df5 | 2012-10-16 15:02:08 +0200 | [diff] [blame] | 31 | |
Zhi-zhou Zhang | e0d6df5 | 2012-10-16 15:02:08 +0200 | [diff] [blame] | 32 | void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1) |
| 33 | { |
| 34 | write_c0_entrylo0(low0); |
| 35 | write_c0_pagemask(pagemask); |
| 36 | write_c0_entrylo1(low1); |
| 37 | write_c0_entryhi(hi); |
| 38 | write_c0_index(index); |
| 39 | tlb_write_indexed(); |
| 40 | } |
Paul Burton | dc2037e | 2016-09-21 11:18:48 +0100 | [diff] [blame] | 41 | |
| 42 | int arch_cpu_init(void) |
| 43 | { |
| 44 | mips_cache_probe(); |
| 45 | return 0; |
| 46 | } |