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Pali Rohár248ef0a2012-10-29 07:54:01 +00001/*
2 * (C) Copyright 2011-2012
3 * Pali Rohár <pali.rohar@gmail.com>
4 *
5 * (C) Copyright 2010
6 * Alistair Buxton <a.j.buxton@gmail.com>
7 *
8 * Derived from Beagle Board code:
9 * (C) Copyright 2006-2008
10 * Texas Instruments.
11 * Richard Woodruff <r-woodruff2@ti.com>
12 * Syed Mohammed Khasim <x0khasim@ti.com>
13 *
14 * Configuration settings for the Nokia RX-51 aka N900.
15 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020016 * SPDX-License-Identifier: GPL-2.0+
Pali Rohár248ef0a2012-10-29 07:54:01 +000017 */
18
19#ifndef __CONFIG_H
20#define __CONFIG_H
21
22/*
23 * High Level Configuration Options
24 */
25
26#define CONFIG_OMAP /* in a TI OMAP core */
Pali Rohár248ef0a2012-10-29 07:54:01 +000027#define CONFIG_OMAP3430 /* which is in a 3430 */
28#define CONFIG_OMAP3_RX51 /* working with RX51 */
29#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
Lokesh Vutla56055052013-07-30 11:36:30 +053030#define CONFIG_OMAP_COMMON
Nishanth Menon53fee1e2015-03-09 17:12:09 -050031/* Common ARM Erratas */
32#define CONFIG_ARM_ERRATA_454179
33#define CONFIG_ARM_ERRATA_430973
34#define CONFIG_ARM_ERRATA_621766
Pali Rohár248ef0a2012-10-29 07:54:01 +000035
36#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
37
38/*
39 * Nokia X-Loader loading secondary image to address 0x80400000
40 * NOLO loading boot image to random place, so it doesn't really
41 * matter what we set this to. We have to copy u-boot to this address
42 */
43#define CONFIG_SYS_TEXT_BASE 0x80008000
44
45#define CONFIG_SDRC /* The chip has SDRC controller */
46
47#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050048#include <asm/arch/omap.h>
Pali Rohár248ef0a2012-10-29 07:54:01 +000049#include <asm/arch/mem.h>
50#include <linux/stringify.h>
51
52/*
53 * Display CPU and Board information
54 */
55#define CONFIG_DISPLAY_CPUINFO
56#define CONFIG_DISPLAY_BOARDINFO
57
58/* Clock Defines */
59#define V_OSCK 26000000 /* Clock output from T2 */
60#define V_SCLK (V_OSCK >> 1)
61
62#undef CONFIG_USE_IRQ /* no support for IRQs */
63#define CONFIG_MISC_INIT_R
64#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
65
66#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
67#define CONFIG_INITRD_TAG /* enable passing initrd */
68#define CONFIG_REVISION_TAG /* enable passing revision tag*/
69#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
70
71/*
72 * Size of malloc() pool
73 */
74#define CONFIG_ENV_SIZE (128 << 10)
75#define CONFIG_UBI_SIZE (512 << 10)
76#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
77 (128 << 10))
78
79/*
80 * Hardware drivers
81 */
82
83/*
84 * NS16550 Configuration
85 */
86#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
87
Pali Rohár248ef0a2012-10-29 07:54:01 +000088#define CONFIG_SYS_NS16550_SERIAL
89#define CONFIG_SYS_NS16550_REG_SIZE (-4)
90#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
91
92/*
93 * select serial console configuration
94 */
95#define CONFIG_CONS_INDEX 3
96#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
97#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */
98
99/* allow to overwrite serial and ethaddr */
100#define CONFIG_ENV_OVERWRITE
101#define CONFIG_BAUDRATE 115200
102#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
103#define CONFIG_MMC
104#define CONFIG_GENERIC_MMC
105#define CONFIG_OMAP_HSMMC
106#define CONFIG_DOS_PARTITION
107
108/* USB */
Paul Kocialkowskif34dfcb2015-08-04 17:04:06 +0200109#define CONFIG_USB_MUSB_UDC
110#define CONFIG_USB_MUSB_HCD
Pali Rohár248ef0a2012-10-29 07:54:01 +0000111#define CONFIG_USB_OMAP3
112#define CONFIG_TWL4030_USB
113
114/* USB device configuration */
115#define CONFIG_USB_DEVICE
116#define CONFIG_USBD_VENDORID 0x0421
117#define CONFIG_USBD_PRODUCTID 0x01c8
118#define CONFIG_USBD_MANUFACTURER "Nokia"
119#define CONFIG_USBD_PRODUCT_NAME "N900"
120
121#define CONFIG_SYS_CONSOLE_IS_IN_ENV
122#define CONFIG_SYS_NO_FLASH
123
124/* commands to include */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000125#define CONFIG_CMD_EXT2 /* EXT2 Support */
126#define CONFIG_CMD_EXT4 /* EXT4 Support */
127#define CONFIG_CMD_FAT /* FAT support */
128
129#define CONFIG_CMD_I2C /* I2C serial bus support */
130#define CONFIG_CMD_MMC /* MMC support */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000131
132#define CONFIG_CMDLINE_EDITING /* add command line history */
133#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
134
Pali Rohár13eb3e42013-03-07 05:15:19 +0000135#define CONFIG_CMD_BOOTMENU /* ANSI terminal Boot Menu */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000136#define CONFIG_CMD_CLEAR /* ANSI terminal clear screen command */
137
138#ifdef ONENAND_SUPPORT
139
140#define CONFIG_CMD_ONENAND /* ONENAND support */
141#define CONFIG_CMD_MTDPARTS /* mtd parts support */
142
143#ifdef UBIFS_SUPPORT
144#define CONFIG_CMD_UBI /* UBI Support */
145#define CONFIG_CMD_UBIFS /* UBIFS Support */
146#endif
147
148#endif
149
Pali Rohár248ef0a2012-10-29 07:54:01 +0000150#define CONFIG_OMAP3_SPI
Heiko Schocherf53f2b82013-10-22 11:03:18 +0200151#define CONFIG_SYS_I2C
152#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
153#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
154#define CONFIG_SYS_I2C_OMAP34XX
Pali Rohár248ef0a2012-10-29 07:54:01 +0000155
156/*
157 * TWL4030
158 */
159#define CONFIG_TWL4030_POWER
160#define CONFIG_TWL4030_LED
161#define CONFIG_TWL4030_KEYPAD
162
163#define CONFIG_OMAP_GPIO
164#define GPIO_SLIDE 71
165
166/*
167 * Board ONENAND Info.
168 */
169
170#define PART1_NAME "bootloader"
171#define PART1_SIZE 128
172#define PART1_MULL 1024
173#define PART1_SUFF "k"
174#define PART1_OFFS 0x00000000
175#define PART1_MASK 0x00000003
176
177#define PART2_NAME "config"
178#define PART2_SIZE 384
179#define PART2_MULL 1024
180#define PART2_SUFF "k"
181#define PART2_OFFS 0x00020000
182#define PART2_MASK 0x00000000
183
184#define PART3_NAME "log"
185#define PART3_SIZE 256
186#define PART3_MULL 1024
187#define PART3_SUFF "k"
188#define PART3_OFFS 0x00080000
189#define PART3_MASK 0x00000000
190
191#define PART4_NAME "kernel"
192#define PART4_SIZE 2
193#define PART4_MULL 1024*1024
194#define PART4_SUFF "m"
195#define PART4_OFFS 0x000c0000
196#define PART4_MASK 0x00000000
197
198#define PART5_NAME "initfs"
199#define PART5_SIZE 2
200#define PART5_MULL 1024*1024
201#define PART5_SUFF "m"
202#define PART5_OFFS 0x002c0000
203#define PART5_MASK 0x00000000
204
205#define PART6_NAME "rootfs"
206#define PART6_SIZE 257280
207#define PART6_MULL 1024
208#define PART6_SUFF "k"
209#define PART6_OFFS 0x004c0000
210#define PART6_MASK 0x00000000
211
212#ifdef ONENAND_SUPPORT
213
Pali Rohár248ef0a2012-10-29 07:54:01 +0000214#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
215#define CONFIG_MTD_DEVICE
216#define CONFIG_MTD_PARTITIONS
217
218#ifdef UBIFS_SUPPORT
219#define CONFIG_RBTREE
220#define CONFIG_LZO
221#endif
222
223#define MTDIDS_DEFAULT "onenand0=onenand"
224#define MTDPARTS_DEFAULT "mtdparts=onenand:" \
225 __stringify(PART1_SIZE) PART1_SUFF "(" PART1_NAME ")ro," \
226 __stringify(PART2_SIZE) PART2_SUFF "(" PART2_NAME ")," \
227 __stringify(PART3_SIZE) PART3_SUFF "(" PART3_NAME ")," \
228 __stringify(PART4_SIZE) PART4_SUFF "(" PART4_NAME ")," \
229 __stringify(PART5_SIZE) PART5_SUFF "(" PART5_NAME ")," \
230 "-(" PART6_NAME ")"
231
232#endif
233
234/* Watchdog support */
235#define CONFIG_HW_WATCHDOG
236
237/*
238 * Framebuffer
239 */
240/* Video console */
241#define CONFIG_VIDEO
242#define CONFIG_CFB_CONSOLE
243#define CONFIG_CFB_CONSOLE_ANSI /* Enable ANSI escape codes in framebuffer */
244#define CONFIG_VIDEO_LOGO
245#define VIDEO_FB_16BPP_PIXEL_SWAP
246#define VIDEO_FB_16BPP_WORD_SWAP
247#define CONFIG_VIDEO_SW_CURSOR
248#define CONFIG_SPLASH_SCREEN
249
250/* functions for cfb_console */
251#define VIDEO_KBD_INIT_FCT rx51_kp_init()
252#define VIDEO_TSTC_FCT rx51_kp_tstc
253#define VIDEO_GETC_FCT rx51_kp_getc
254#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -0600255struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +0000256int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -0600257int rx51_kp_tstc(struct stdio_dev *sdev);
258int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +0000259#endif
260
261#ifndef MTDPARTS_DEFAULT
262#define MTDPARTS_DEFAULT
263#endif
264
265/* Environment information */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000266#define CONFIG_EXTRA_ENV_SETTINGS \
267 "mtdparts=" MTDPARTS_DEFAULT "\0" \
268 "usbtty=cdc_acm\0" \
269 "stdin=vga\0" \
270 "stdout=vga\0" \
271 "stderr=vga\0" \
272 "setcon=setenv stdin ${con};" \
273 "setenv stdout ${con};" \
274 "setenv stderr ${con}\0" \
275 "sercon=setenv con serial; run setcon\0" \
276 "usbcon=setenv con usbtty; run setcon\0" \
277 "vgacon=setenv con vga; run setcon\0" \
278 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
279 "switchmmc=mmc dev ${mmcnum}\0" \
280 "kernaddr=0x82008000\0" \
281 "initrdaddr=0x84008000\0" \
282 "scriptaddr=0x86008000\0" \
283 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
284 "${loadaddr} ${mmcfile}\0" \
285 "kernload=setenv loadaddr ${kernaddr};" \
286 "setenv mmcfile ${mmckernfile};" \
287 "run fileload\0" \
288 "initrdload=setenv loadaddr ${initrdaddr};" \
289 "setenv mmcfile ${mmcinitrdfile};" \
290 "run fileload\0" \
291 "scriptload=setenv loadaddr ${scriptaddr};" \
292 "setenv mmcfile ${mmcscriptfile};" \
293 "run fileload\0" \
294 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
295 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
296 "kernboot=echo Booting ${mmckernfile} from mmc " \
297 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
298 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
299 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
300 "attachboot=echo Booting attached kernel image ...;" \
301 "setenv setup_omap_atag 1;" \
302 "bootm ${attkernaddr};" \
303 "setenv setup_omap_atag\0" \
304 "trymmcscriptboot=if run switchmmc; then " \
305 "if run scriptload; then " \
306 "run scriptboot;" \
307 "fi;" \
308 "fi\0" \
309 "trymmckernboot=if run switchmmc; then " \
310 "if run kernload; then " \
311 "run kernboot;" \
312 "fi;" \
313 "fi\0" \
314 "trymmckerninitrdboot=if run switchmmc; then " \
315 "if run initrdload; then " \
316 "if run kernload; then " \
317 "run kerninitrdboot;" \
318 "fi;" \
319 "fi; " \
320 "fi\0" \
321 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
322 "setenv mmckernfile uImage; run trymmckernboot\0" \
323 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
324 "setenv mmcpart 2; run trymmcpartboot;" \
325 "setenv mmcpart 3; run trymmcpartboot;" \
326 "setenv mmcpart 4; run trymmcpartboot\0" \
327 "trymmcboot=if run switchmmc; then " \
328 "setenv mmctype fat;" \
329 "run trymmcallpartboot;" \
330 "setenv mmctype ext2;" \
331 "run trymmcallpartboot;" \
332 "setenv mmctype ext4;" \
333 "run trymmcallpartboot;" \
334 "fi\0" \
335 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
336 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000337 "menucmd=bootmenu\0" \
338 "bootmenu_0=Attached kernel=run attachboot\0" \
339 "bootmenu_1=Internal eMMC=run emmcboot\0" \
340 "bootmenu_2=External SD card=run sdboot\0" \
341 "bootmenu_3=U-Boot boot order=boot\0" \
342 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000343 ""
344
345#define CONFIG_PREBOOT \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000346 "setenv mmcnum 1; setenv mmcpart 1;" \
347 "setenv mmcscriptfile bootmenu.scr;" \
348 "if run switchmmc; then " \
349 "setenv mmcdone true;" \
350 "setenv mmctype fat;" \
351 "if run scriptload; then true; else " \
352 "setenv mmctype ext2;" \
353 "if run scriptload; then true; else " \
354 "setenv mmctype ext4;" \
355 "if run scriptload; then true; else " \
356 "setenv mmcdone false;" \
357 "fi;" \
358 "fi;" \
359 "fi;" \
360 "if ${mmcdone}; then " \
361 "run scriptboot;" \
362 "fi;" \
363 "fi;" \
364 "if run slide; then true; else " \
365 "setenv bootmenu_delay 0;" \
366 "setenv bootdelay 0;" \
367 "fi"
368
369#define CONFIG_POSTBOOTMENU \
370 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000371 "echo Extra commands:;" \
372 "echo run sercon - Use serial port for control.;" \
373 "echo run usbcon - Use usbtty for control.;" \
374 "echo run vgacon - Use framebuffer/keyboard.;" \
375 "echo run sdboot - Boot from SD card slot.;" \
376 "echo run emmcboot - Boot internal eMMC memory.;" \
377 "echo run attachboot - Boot attached kernel image.;" \
378 "echo"
379
380#define CONFIG_BOOTCOMMAND \
381 "run sdboot;" \
382 "run emmcboot;" \
383 "run attachboot;" \
384 "echo"
385
Pali Rohár13eb3e42013-03-07 05:15:19 +0000386#define CONFIG_BOOTDELAY 30
Pali Rohár13eb3e42013-03-07 05:15:19 +0000387#define CONFIG_MENU
388#define CONFIG_MENU_SHOW
389
Pali Rohár248ef0a2012-10-29 07:54:01 +0000390/*
391 * Miscellaneous configurable options
392 */
393#define CONFIG_SYS_LONGHELP /* undef to save memory */
394#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
395#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Pali Rohár248ef0a2012-10-29 07:54:01 +0000396#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
397/* Print Buffer Size */
398#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
399 sizeof(CONFIG_SYS_PROMPT) + 16)
400#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
401/* Boot Argument Buffer Size */
402#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
403
404#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
405#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/
406
407/* default load address */
408#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
409
410/*
411 * OMAP3 has 12 GP timers, they can be driven by the system clock
412 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
413 * This rate is divided by a local divisor.
414 */
415#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
416#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000417
418/*
419 * Stack sizes
420 *
421 * The stack sizes are set up in start.S using the settings below
422 */
423#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
424
425/*
426 * Physical Memory Map
427 */
428#define CONFIG_NR_DRAM_BANKS 2
429#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
430
431/*
432 * FLASH and environment organization
433 */
434
435#define CONFIG_ENV_IS_NOWHERE
436
437#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
438#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
439#define CONFIG_SYS_INIT_RAM_SIZE 0x800
440#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
441 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
442
443/*
444 * Attached kernel image
445 */
446
447#define SDRAM_SIZE 0x10000000 /* 256 MB */
448#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
449
450#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
451#define KERNEL_OFFSET 0x40000 /* 256 kB */
452#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
453#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
454
455/* Reserve protected RAM for attached kernel */
456#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
457
458#endif /* __CONFIG_H */