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Chris Packham5cd63ec2018-05-30 20:14:35 +12001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2010, 2018
4 * Allied Telesis <www.alliedtelesis.com>
5 */
6
Simon Glass97589732020-05-10 11:40:02 -06007#include <init.h>
Simon Glass0c364412019-12-28 10:44:48 -07008#include <net.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06009#include <asm/global_data.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060010#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060011#include <linux/delay.h>
Chris Packham5cd63ec2018-05-30 20:14:35 +120012#include <linux/io.h>
13#include <miiphy.h>
14#include <netdev.h>
Chris Packhame0e3c842022-08-04 21:06:23 +120015#include <led.h>
Chris Packham5cd63ec2018-05-30 20:14:35 +120016#include <asm/arch/cpu.h>
17#include <asm/arch/soc.h>
18#include <asm/arch/mpp.h>
Chris Packham500a8812022-08-04 21:06:24 +120019#include <asm-generic/gpio.h>
20#include <dm.h>
Chris Packham5cd63ec2018-05-30 20:14:35 +120021
22/* Note: GPIO differences between specific boards
23 *
24 * We're trying to avoid having multiple build targets for all the Kirkwood
25 * based boards one area where things tend to differ is GPIO usage. For the
26 * most part the GPIOs driven by the bootloader are similar enough in function
27 * that there is no harm in driving them.
28 *
29 * XZ4 XS6 XS16 GS24A GT40 GP24A GT24A
30 * GPIO39 - INT(<) NC MUX_RST_N(>) NC POE_DIS_N(>) NC
31 */
32
33#define SBX81LIFKW_OE_LOW ~(BIT(31) | BIT(30) | BIT(28) | BIT(27) | \
34 BIT(18) | BIT(17) | BIT(13) | BIT(12) | \
35 BIT(10))
36#define SBX81LIFKW_OE_HIGH ~(BIT(0) | BIT(1) | BIT(7))
37#define SBX81LIFKW_OE_VAL_LOW (BIT(31) | BIT(30) | BIT(28) | BIT(27))
38#define SBX81LIFKW_OE_VAL_HIGH (BIT(0) | BIT(1))
39
Chris Packham5cd63ec2018-05-30 20:14:35 +120040DECLARE_GLOBAL_DATA_PTR;
41
Chris Packham5cd63ec2018-05-30 20:14:35 +120042int board_early_init_f(void)
43{
44 /*
45 * default gpio configuration
46 * There are maximum 64 gpios controlled through 2 sets of registers
47 * the below configuration configures mainly initial LED status
48 */
49 mvebu_config_gpio(SBX81LIFKW_OE_VAL_LOW,
50 SBX81LIFKW_OE_VAL_HIGH,
51 SBX81LIFKW_OE_LOW, SBX81LIFKW_OE_HIGH);
52
53 /* Multi-Purpose Pins Functionality configuration */
54 static const u32 kwmpp_config[] = {
55 MPP0_SPI_SCn,
56 MPP1_SPI_MOSI,
57 MPP2_SPI_SCK,
58 MPP3_SPI_MISO,
59 MPP4_UART0_RXD,
60 MPP5_UART0_TXD,
61 MPP6_SYSRST_OUTn,
62 MPP7_PEX_RST_OUTn,
63 MPP8_TW_SDA,
64 MPP9_TW_SCK,
65 MPP10_GPO,
66 MPP11_GPIO,
67 MPP12_GPO,
68 MPP13_GPIO,
69 MPP14_GPIO,
70 MPP15_UART0_RTS,
71 MPP16_UART0_CTS,
72 MPP17_GPIO,
73 MPP18_GPO,
74 MPP19_GPO,
75 MPP20_GPIO,
76 MPP21_GPIO,
77 MPP22_GPIO,
78 MPP23_GPIO,
79 MPP24_GPIO,
80 MPP25_GPIO,
81 MPP26_GPIO,
82 MPP27_GPIO,
83 MPP28_GPIO,
84 MPP29_GPIO,
85 MPP30_GPIO,
86 MPP31_GPIO,
87 MPP32_GPIO,
88 MPP33_GPIO,
89 MPP34_GPIO,
90 MPP35_GPIO,
91 MPP36_GPIO,
92 MPP37_GPIO,
93 MPP38_GPIO,
94 MPP39_GPIO,
95 MPP40_GPIO,
96 MPP41_GPIO,
97 MPP42_GPIO,
98 MPP43_GPIO,
99 MPP44_GPIO,
100 MPP45_GPIO,
101 MPP46_GPIO,
102 MPP47_GPIO,
103 MPP48_GPIO,
104 MPP49_GPIO,
105 0
106 };
107
108 kirkwood_mpp_conf(kwmpp_config, NULL);
109 return 0;
110}
111
112int board_init(void)
113{
114 /* Power-down unused subsystems. The required
115 * subsystems are:
116 *
117 * GE0 b0
118 * PEX0 PHY b1
119 * PEX0.0 b2
120 * TSU b5
121 * SDRAM b6
122 * RUNIT b7
123 */
124 writel((BIT(0) | BIT(1) | BIT(2) |
125 BIT(5) | BIT(6) | BIT(7)),
126 KW_CPU_REG_BASE + 0x1c);
127
128 /* address of boot parameters */
129 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
130
Chris Packham5cd63ec2018-05-30 20:14:35 +1200131 return 0;
132}
133
Chris Packham83bfe792018-06-03 16:21:27 +1200134#ifdef CONFIG_RESET_PHY_R
135/* automatically defined by kirkwood config.h */
Chris Packham5cd63ec2018-05-30 20:14:35 +1200136void reset_phy(void)
137{
Chris Packham83bfe792018-06-03 16:21:27 +1200138}
139#endif
140
141#ifdef CONFIG_MV88E61XX_SWITCH
142int mv88e61xx_hw_reset(struct phy_device *phydev)
143{
Chris Packham500a8812022-08-04 21:06:24 +1200144 struct gpio_desc desc;
145 int ret;
146
147 ret = dm_gpio_lookup_name("mvebu0_27", &desc);
148 if (ret)
149 return ret;
150
151 ret = dm_gpio_request(&desc, "linkstreet_rst");
152 if (ret)
153 return ret;
154
Chris Packham5cd63ec2018-05-30 20:14:35 +1200155 /* Ensure the 88e6097 gets at least 10ms Reset
156 */
Chris Packham500a8812022-08-04 21:06:24 +1200157 dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
158 dm_gpio_set_value(&desc, 0);
Chris Packham5cd63ec2018-05-30 20:14:35 +1200159 mdelay(20);
Chris Packham500a8812022-08-04 21:06:24 +1200160 dm_gpio_set_value(&desc, 1);
Chris Packham5cd63ec2018-05-30 20:14:35 +1200161 mdelay(20);
Chris Packham83bfe792018-06-03 16:21:27 +1200162
163 phydev->advertising = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
164
165 return 0;
Chris Packham5cd63ec2018-05-30 20:14:35 +1200166}
167#endif
168
169#ifdef CONFIG_MISC_INIT_R
170int misc_init_r(void)
171{
Chris Packhame0e3c842022-08-04 21:06:23 +1200172 struct udevice *dev;
173 int ret;
174
175 ret = led_get_by_label("status:ledp", &dev);
176 if (!ret)
177 led_set_state(dev, LEDST_ON);
178
179 ret = led_get_by_label("status:ledn", &dev);
180 if (!ret)
181 led_set_state(dev, LEDST_OFF);
Chris Packham5cd63ec2018-05-30 20:14:35 +1200182
183 return 0;
184}
185#endif