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Wolfgang Denk4646d2a2006-05-30 15:56:48 +02001/**
2 * @file IxNpeMhConfig_p.h
3 *
4 * @author Intel Corporation
5 * @date 18 Jan 2002
6 *
7 * @brief This file contains the private API for the Configuration module.
8 *
9 *
10 * @par
11 * IXP400 SW Release version 2.0
12 *
13 * -- Copyright Notice --
14 *
15 * @par
16 * Copyright 2001-2005, Intel Corporation.
17 * All rights reserved.
18 *
19 * @par
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 * 1. Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * 3. Neither the name of the Intel Corporation nor the names of its contributors
29 * may be used to endorse or promote products derived from this software
30 * without specific prior written permission.
31 *
32 * @par
33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
34 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
37 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
41 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * SUCH DAMAGE.
44 *
45 * @par
46 * -- End of Copyright Notice --
47*/
48
49/**
50 * @defgroup IxNpeMhConfig_p IxNpeMhConfig_p
51 *
52 * @brief The private API for the Configuration module.
53 *
54 * @{
55 */
56
57#ifndef IXNPEMHCONFIG_P_H
58#define IXNPEMHCONFIG_P_H
59
60#include "IxOsal.h"
61
62#include "IxNpeMh.h"
63#include "IxNpeMhMacros_p.h"
64
65/*
66 * inline definition
67 */
68/* enable function inlining for performances */
69#ifdef IXNPEMHSOLICITEDCBMGR_C
70/* Non-inline functions will be defined in this translation unit.
71 Reason is that in GNU Compiler, if the Optimization is turn off, all extern inline
72 functions will not be compiled.
73*/
74# ifndef __wince
75# ifndef IXNPEMHCONFIG_INLINE
76# define IXNPEMHCONFIG_INLINE
77# endif
78# else
79# ifndef IXNPEMHCONFIG_INLINE
80# define IXNPEMHCONFIG_INLINE IX_OSAL_INLINE_EXTERN
81# endif
82# endif /* __wince*/
83
84#else
85
86# ifndef IXNPEMHCONFIG_INLINE
87# define IXNPEMHCONFIG_INLINE IX_OSAL_INLINE_EXTERN
88# endif /* IXNPEMHCONFIG_INLINE */
89#endif /* IXNPEMHSOLICITEDCBMGR_C */
90/*
91 * Typedefs and #defines, etc.
92 */
93
94typedef void (*IxNpeMhConfigIsr) (int); /**< ISR function pointer */
95
96/**
97 * @struct IxNpeMhConfigNpeInfo
98 *
99 * @brief This structure is used to maintain the configuration information
100 * associated with an NPE.
101 */
102
103typedef struct
104{
105 IxOsalMutex mutex; /**< mutex */
106 UINT32 interruptId; /**< interrupt ID */
107 UINT32 virtualRegisterBase; /**< register virtual base address */
108 UINT32 statusRegister; /**< status register virtual address */
109 UINT32 controlRegister; /**< control register virtual address */
110 UINT32 inFifoRegister; /**< inFIFO register virutal address */
111 UINT32 outFifoRegister; /**< outFIFO register virtual address */
112 IxNpeMhConfigIsr isr; /**< isr routine for handling interrupt */
113 BOOL oldInterruptState; /**< old interrupt state (TRUE => enabled) */
114} IxNpeMhConfigNpeInfo;
115
116
117/*
118 * #defines for function return types, etc.
119 */
120
121/**< NPE register base address */
122#define IX_NPEMH_NPE_BASE (IX_OSAL_IXP400_PERIPHERAL_PHYS_BASE)
123
124#define IX_NPEMH_NPEA_OFFSET (0x6000) /**< NPE-A register base offset */
125#define IX_NPEMH_NPEB_OFFSET (0x7000) /**< NPE-B register base offset */
126#define IX_NPEMH_NPEC_OFFSET (0x8000) /**< NPE-C register base offset */
127
128#define IX_NPEMH_NPESTAT_OFFSET (0x002C) /**< NPE status register offset */
129#define IX_NPEMH_NPECTL_OFFSET (0x0030) /**< NPE control register offset */
130#define IX_NPEMH_NPEFIFO_OFFSET (0x0038) /**< NPE FIFO register offset */
131
132/** NPE-A register base address */
133#define IX_NPEMH_NPEA_BASE (IX_NPEMH_NPE_BASE + IX_NPEMH_NPEA_OFFSET)
134/** NPE-B register base address */
135#define IX_NPEMH_NPEB_BASE (IX_NPEMH_NPE_BASE + IX_NPEMH_NPEB_OFFSET)
136/** NPE-C register base address */
137#define IX_NPEMH_NPEC_BASE (IX_NPEMH_NPE_BASE + IX_NPEMH_NPEC_OFFSET)
138
139/* NPE-A configuration */
140
141/** NPE-A interrupt */
142#define IX_NPEMH_NPEA_INT (IX_OSAL_IXP400_NPEA_IRQ_LVL)
143/** NPE-A FIFO register */
144#define IX_NPEMH_NPEA_FIFO (IX_NPEMH_NPEA_BASE + IX_NPEMH_NPEFIFO_OFFSET)
145/** NPE-A control register */
146#define IX_NPEMH_NPEA_CTL (IX_NPEMH_NPEA_BASE + IX_NPEMH_NPECTL_OFFSET)
147/** NPE-A status register */
148#define IX_NPEMH_NPEA_STAT (IX_NPEMH_NPEA_BASE + IX_NPEMH_NPESTAT_OFFSET)
149
150/* NPE-B configuration */
151
152/** NPE-B interrupt */
153#define IX_NPEMH_NPEB_INT (IX_OSAL_IXP400_NPEB_IRQ_LVL)
154/** NPE-B FIFO register */
155#define IX_NPEMH_NPEB_FIFO (IX_NPEMH_NPEB_BASE + IX_NPEMH_NPEFIFO_OFFSET)
156/** NPE-B control register */
157#define IX_NPEMH_NPEB_CTL (IX_NPEMH_NPEB_BASE + IX_NPEMH_NPECTL_OFFSET)
158/** NPE-B status register */
159#define IX_NPEMH_NPEB_STAT (IX_NPEMH_NPEB_BASE + IX_NPEMH_NPESTAT_OFFSET)
160
161/* NPE-C configuration */
162
163/** NPE-C interrupt */
164#define IX_NPEMH_NPEC_INT (IX_OSAL_IXP400_NPEC_IRQ_LVL)
165/** NPE-C FIFO register */
166#define IX_NPEMH_NPEC_FIFO (IX_NPEMH_NPEC_BASE + IX_NPEMH_NPEFIFO_OFFSET)
167/** NPE-C control register */
168#define IX_NPEMH_NPEC_CTL (IX_NPEMH_NPEC_BASE + IX_NPEMH_NPECTL_OFFSET)
169/** NPE-C status register */
170#define IX_NPEMH_NPEC_STAT (IX_NPEMH_NPEC_BASE + IX_NPEMH_NPESTAT_OFFSET)
171
172/* NPE control register bit definitions */
173#define IX_NPEMH_NPE_CTL_OFE (1 << 16) /**< OutFifoEnable */
174#define IX_NPEMH_NPE_CTL_IFE (1 << 17) /**< InFifoEnable */
175#define IX_NPEMH_NPE_CTL_OFEWE (1 << 24) /**< OutFifoEnableWriteEnable */
176#define IX_NPEMH_NPE_CTL_IFEWE (1 << 25) /**< InFifoEnableWriteEnable */
177
178/* NPE status register bit definitions */
179#define IX_NPEMH_NPE_STAT_OFNE (1 << 16) /**< OutFifoNotEmpty */
180#define IX_NPEMH_NPE_STAT_IFNF (1 << 17) /**< InFifoNotFull */
181#define IX_NPEMH_NPE_STAT_OFNF (1 << 18) /**< OutFifoNotFull */
182#define IX_NPEMH_NPE_STAT_IFNE (1 << 19) /**< InFifoNotEmpty */
183#define IX_NPEMH_NPE_STAT_MBINT (1 << 20) /**< Mailbox interrupt */
184#define IX_NPEMH_NPE_STAT_IFINT (1 << 21) /**< InFifo interrupt */
185#define IX_NPEMH_NPE_STAT_OFINT (1 << 22) /**< OutFifo interrupt */
186#define IX_NPEMH_NPE_STAT_WFINT (1 << 23) /**< WatchFifo interrupt */
187
188
189/**
190 * Variable declarations. Externs are followed by static variables.
191 */
192extern IxNpeMhConfigNpeInfo ixNpeMhConfigNpeInfo[IX_NPEMH_NUM_NPES];
193
194
195/*
196 * Prototypes for interface functions.
197 */
198
199/**
200 * @fn void ixNpeMhConfigInitialize (
201 IxNpeMhNpeInterrupts npeInterrupts)
202 *
203 * @brief This function initialises the Configuration module.
204 *
205 * @param IxNpeMhNpeInterrupts npeInterrupts (in) - whether or not to
206 * service the NPE "outFIFO not empty" interrupts.
207 *
208 * @return No return value.
209 */
210
211void ixNpeMhConfigInitialize (
212 IxNpeMhNpeInterrupts npeInterrupts);
213
214/**
215 * @fn void ixNpeMhConfigUninit (void)
216 *
217 * @brief This function uninitialises the Configuration module.
218 *
219 * @return No return value.
220 */
221
222void ixNpeMhConfigUninit (void);
223
224/**
225 * @fn void ixNpeMhConfigIsrRegister (
226 IxNpeMhNpeId npeId,
227 IxNpeMhConfigIsr isr)
228 *
229 * @brief This function registers an ISR to handle NPE "outFIFO not
230 * empty" interrupts.
231 *
232 * @param IxNpeMhNpeId npeId (in) - the ID of the NPE whose interrupt will
233 * be handled.
234 * @param IxNpeMhConfigIsr isr (in) - the ISR function pointer that the
235 * interrupt will trigger.
236 *
237 * @return No return value.
238 */
239
240void ixNpeMhConfigIsrRegister (
241 IxNpeMhNpeId npeId,
242 IxNpeMhConfigIsr isr);
243
244/**
245 * @fn BOOL ixNpeMhConfigNpeInterruptEnable (
246 IxNpeMhNpeId npeId)
247 *
248 * @brief This function enables a NPE's "outFIFO not empty" interrupt.
249 *
250 * @param IxNpeMhNpeId npeId (in) - the ID of the NPE whose interrupt will
251 * be enabled.
252 *
253 * @return Returns the previous state of the interrupt (TRUE => enabled).
254 */
255
256BOOL ixNpeMhConfigNpeInterruptEnable (
257 IxNpeMhNpeId npeId);
258
259/**
260 * @fn BOOL ixNpeMhConfigNpeInterruptDisable (
261 IxNpeMhNpeId npeId)
262 *
263 * @brief This function disables a NPE's "outFIFO not empty" interrupt
264 *
265 * @param IxNpeMhNpeId npeId (in) - the ID of the NPE whose interrupt will
266 * be disabled.
267 *
268 * @return Returns the previous state of the interrupt (TRUE => enabled).
269 */
270
271BOOL ixNpeMhConfigNpeInterruptDisable (
272 IxNpeMhNpeId npeId);
273
274/**
275 * @fn IxNpeMhMessageId ixNpeMhConfigMessageIdGet (
276 IxNpeMhMessage message)
277 *
278 * @brief This function gets the ID of a message.
279 *
280 * @param IxNpeMhMessage message (in) - the message to get the ID of.
281 *
282 * @return the ID of the message
283 */
284
285IxNpeMhMessageId ixNpeMhConfigMessageIdGet (
286 IxNpeMhMessage message);
287
288/**
289 * @fn BOOL ixNpeMhConfigNpeIdIsValid (
290 IxNpeMhNpeId npeId)
291 *
292 * @brief This function checks to see if a NPE ID is valid.
293 *
294 * @param IxNpeMhNpeId npeId (in) - the NPE ID to validate.
295 *
296 * @return True if the NPE ID is valid, otherwise False.
297 */
298
299BOOL ixNpeMhConfigNpeIdIsValid (
300 IxNpeMhNpeId npeId);
301
302/**
303 * @fn void ixNpeMhConfigLockGet (
304 IxNpeMhNpeId npeId)
305 *
306 * @brief This function gets a lock for exclusive NPE interaction, and
307 * disables the NPE's "outFIFO not empty" interrupt.
308 *
309 * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which to get the
310 * lock and disable its interrupt.
311 *
312 * @return No return value.
313 */
314
315void ixNpeMhConfigLockGet (
316 IxNpeMhNpeId npeId);
317
318/**
319 * @fn void ixNpeMhConfigLockRelease (
320 IxNpeMhNpeId npeId)
321 *
322 * @brief This function releases a lock for exclusive NPE interaction, and
323 * enables the NPE's "outFIFO not empty" interrupt.
324 *
325 * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which to release
326 * the lock and enable its interrupt.
327 *
328 * @return No return value.
329 */
330
331void ixNpeMhConfigLockRelease (
332 IxNpeMhNpeId npeId);
333
334/**
335 * @fn BOOL ixNpeMhConfigInFifoIsEmpty (
336 IxNpeMhNpeId npeId)
337 *
338 * @brief This inline function checks if a NPE's inFIFO is empty.
339 *
340 * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the inFIFO
341 * will be checked.
342 *
343 * @return True if the inFIFO is empty, otherwise False.
344 */
345
346IXNPEMHCONFIG_INLINE BOOL ixNpeMhConfigInFifoIsEmpty (
347 IxNpeMhNpeId npeId);
348
349/**
350 * @fn BOOL ixNpeMhConfigInFifoIsFull (
351 IxNpeMhNpeId npeId)
352 *
353 * @brief This inline function checks if a NPE's inFIFO is full.
354 *
355 * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the inFIFO
356 * will be checked.
357 *
358 * @return True if the inFIFO is full, otherwise False.
359 */
360
361IXNPEMHCONFIG_INLINE BOOL ixNpeMhConfigInFifoIsFull (
362 IxNpeMhNpeId npeId);
363
364/**
365 * @fn BOOL ixNpeMhConfigOutFifoIsEmpty (
366 IxNpeMhNpeId npeId)
367 *
368 * @brief This inline function checks if a NPE's outFIFO is empty.
369 *
370 * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the outFIFO
371 * will be checked.
372 *
373 * @return True if the outFIFO is empty, otherwise False.
374 */
375
376IXNPEMHCONFIG_INLINE BOOL ixNpeMhConfigOutFifoIsEmpty (
377 IxNpeMhNpeId npeId);
378
379/**
380 * @fn BOOL ixNpeMhConfigOutFifoIsFull (
381 IxNpeMhNpeId npeId)
382 *
383 * @brief This inline function checks if a NPE's outFIFO is full.
384 *
385 * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the outFIFO
386 * will be checked.
387 *
388 * @return True if the outFIFO is full, otherwise False.
389 */
390
391IXNPEMHCONFIG_INLINE BOOL ixNpeMhConfigOutFifoIsFull (
392 IxNpeMhNpeId npeId);
393
394/**
395 * @fn IX_STATUS ixNpeMhConfigInFifoWrite (
396 IxNpeMhNpeId npeId,
397 IxNpeMhMessage message)
398 *
399 * @brief This function writes a message to a NPE's inFIFO. The caller
400 * must first check that the NPE's inFifo is not full. After writing the first
401 * word of the message, this function will keep polling NPE's inFIFO is not
402 * full to write the second word. If inFIFO is not available after maximum
403 * retries (IX_NPE_MH_MAX_NUM_OF_RETRIES), this function will return TIMEOUT
404 * status to indicate NPE hang / halt.
405 *
406 * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the inFIFO
407 * will be written to.
408 * @param IxNpeMhMessage message (in) - The message to write.
409 *
410 * @return The function returns a status indicating success, failure or timeout.
411 */
412
413IX_STATUS ixNpeMhConfigInFifoWrite (
414 IxNpeMhNpeId npeId,
415 IxNpeMhMessage message);
416
417/**
418 * @fn IX_STATUS ixNpeMhConfigOutFifoRead (
419 IxNpeMhNpeId npeId,
420 IxNpeMhMessage *message)
421 *
422 * @brief This function reads a message from a NPE's outFIFO. The caller
423 * must first check that the NPE's outFifo is not empty. After reading the first
424 * word of the message, this function will keep polling NPE's outFIFO is not
425 * empty to read the second word. If outFIFO is empty after maximum
426 * retries (IX_NPE_MH_MAX_NUM_OF_RETRIES), this function will return TIMEOUT
427 * status to indicate NPE hang / halt.
428 *
429 * @param IxNpeMhNpeId npeId (in) - The ID of the NPE for which the outFIFO
430 * will be read from.
431 * @param IxNpeMhMessage message (out) - The message read.
432 *
433 * @return The function returns a status indicating success, failure or timeout.
434 */
435
436IX_STATUS ixNpeMhConfigOutFifoRead (
437 IxNpeMhNpeId npeId,
438 IxNpeMhMessage *message);
439
440/**
441 * @fn void ixNpeMhConfigShow (
442 IxNpeMhNpeId npeId)
443 *
444 * @brief This function will display the current state of the Configuration
445 * module.
446 *
447 * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to display state
448 * information for.
449 *
450 * @return No return value.
451 */
452
453void ixNpeMhConfigShow (
454 IxNpeMhNpeId npeId);
455
456/**
457 * @fn void ixNpeMhConfigShowReset (
458 IxNpeMhNpeId npeId)
459 *
460 * @brief This function will reset the current state of the Configuration
461 * module.
462 *
463 * @param IxNpeMhNpeId npeId (in) - The ID of the NPE to reset state
464 * information for.
465 *
466 * @return No return value.
467 */
468
469void ixNpeMhConfigShowReset (
470 IxNpeMhNpeId npeId);
471
472/*
473 * Inline functions
474 */
475
476/*
477 * This inline function checks if a NPE's inFIFO is empty.
478 */
479
480IXNPEMHCONFIG_INLINE
481BOOL ixNpeMhConfigInFifoIsEmpty (
482 IxNpeMhNpeId npeId)
483{
484 UINT32 ifne;
485 volatile UINT32 *statusReg =
486 (UINT32 *)ixNpeMhConfigNpeInfo[npeId].statusRegister;
487
488 /* get the IFNE (InFifoNotEmpty) bit of the status register */
489 IX_NPEMH_REGISTER_READ_BITS (statusReg, &ifne, IX_NPEMH_NPE_STAT_IFNE);
490
491 /* if the IFNE status bit is unset then the inFIFO is empty */
492 return (ifne == 0);
493}
494
495
496/*
497 * This inline function checks if a NPE's inFIFO is full.
498 */
499IXNPEMHCONFIG_INLINE
500BOOL ixNpeMhConfigInFifoIsFull (
501 IxNpeMhNpeId npeId)
502{
503 UINT32 ifnf;
504 volatile UINT32 *statusReg =
505 (UINT32 *)ixNpeMhConfigNpeInfo[npeId].statusRegister;
506
507 /* get the IFNF (InFifoNotFull) bit of the status register */
508 IX_NPEMH_REGISTER_READ_BITS (statusReg, &ifnf, IX_NPEMH_NPE_STAT_IFNF);
509
510 /* if the IFNF status bit is unset then the inFIFO is full */
511 return (ifnf == 0);
512}
513
514
515/*
516 * This inline function checks if a NPE's outFIFO is empty.
517 */
518IXNPEMHCONFIG_INLINE
519BOOL ixNpeMhConfigOutFifoIsEmpty (
520 IxNpeMhNpeId npeId)
521{
522 UINT32 ofne;
523 volatile UINT32 *statusReg =
524 (UINT32 *)ixNpeMhConfigNpeInfo[npeId].statusRegister;
525
526 /* get the OFNE (OutFifoNotEmpty) bit of the status register */
527 IX_NPEMH_REGISTER_READ_BITS (statusReg, &ofne, IX_NPEMH_NPE_STAT_OFNE);
528
529 /* if the OFNE status bit is unset then the outFIFO is empty */
530 return (ofne == 0);
531}
532
533/*
534 * This inline function checks if a NPE's outFIFO is full.
535 */
536IXNPEMHCONFIG_INLINE
537BOOL ixNpeMhConfigOutFifoIsFull (
538 IxNpeMhNpeId npeId)
539{
540 UINT32 ofnf;
541 volatile UINT32 *statusReg =
542 (UINT32 *)ixNpeMhConfigNpeInfo[npeId].statusRegister;
543
544 /* get the OFNF (OutFifoNotFull) bit of the status register */
545 IX_NPEMH_REGISTER_READ_BITS (statusReg, &ofnf, IX_NPEMH_NPE_STAT_OFNF);
546
547 /* if the OFNF status bit is unset then the outFIFO is full */
548 return (ofnf == 0);
549}
550
551#endif /* IXNPEMHCONFIG_P_H */
552
553/**
554 * @} defgroup IxNpeMhConfig_p
555 */