| developer | 18ec8d6 | 2020-11-12 16:35:52 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (C) 2020 MediaTek Inc. |
| 4 | * |
| 5 | * Author: Weijie Gao <weijie.gao@mediatek.com> |
| 6 | */ |
| 7 | |
| 8 | #include <config.h> |
| 9 | #include <asm-offsets.h> |
| 10 | #include <asm/regdef.h> |
| 11 | #include <asm/asm.h> |
| 12 | |
| 13 | .set noreorder |
| 14 | |
| 15 | NESTED(lowlevel_init, 0, ra) |
| 16 | /* Save ra and do real lowlevel initialization */ |
| 17 | move s0, ra |
| 18 | |
| 19 | /* |
| 20 | * Use SRAM from 802.11n MAC/BBP, 16KiB (0x10184000 ~ 0x10187fff) |
| 21 | * NOTE: non-word operations may fail in this SRAM. |
| 22 | * Use it as stack only for CPU/DRAM init which only has word operations. |
| 23 | */ |
| 24 | PTR_LI sp, 0xb0187f00 |
| 25 | |
| 26 | /* We still need a temporary gd for udelay */ |
| 27 | PTR_SUBU \ |
| 28 | sp, sp, GD_SIZE # reserve space for gd |
| 29 | li t0, -16 |
| 30 | and sp, sp, t0 # force 16 byte alignment |
| 31 | move k0, sp # save gd pointer |
| 32 | |
| 33 | move fp, sp |
| 34 | |
| 35 | /* Clear gd */ |
| 36 | move t0, k0 |
| 37 | 1: |
| 38 | PTR_S zero, 0(t0) |
| 39 | PTR_ADDIU t0, PTRSIZE |
| 40 | blt t0, t1, 1b |
| 41 | nop |
| 42 | |
| 43 | /* Do CPU & DRAM initialization */ |
| 44 | PTR_LA t9, mt7620_init |
| 45 | jalr t9 |
| 46 | nop |
| 47 | |
| 48 | /* Restore ra */ |
| 49 | move ra, s0 |
| 50 | |
| 51 | jr ra |
| 52 | nop |
| 53 | END(lowlevel_init) |