| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| Darwin Rambo | c561314 | 2014-02-11 11:06:34 -0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2013 Broadcom Corporation. |
| Darwin Rambo | c561314 | 2014-02-11 11:06:34 -0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| Simon Glass | afb0215 | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 7 | #include <cpu_func.h> |
| Darwin Rambo | c561314 | 2014-02-11 11:06:34 -0800 | [diff] [blame] | 8 | #include <asm/io.h> |
| 9 | #include <asm/arch/sysmap.h> |
| 10 | |
| 11 | #define EN_MASK 0x08000000 /* Enable timer */ |
| 12 | #define SRSTEN_MASK 0x04000000 /* Enable soft reset */ |
| 13 | #define CLKS_SHIFT 20 /* Clock period shift */ |
| 14 | #define LD_SHIFT 0 /* Reload value shift */ |
| 15 | |
| 16 | void reset_cpu(ulong ignored) |
| 17 | { |
| 18 | /* |
| 19 | * Set WD enable, RST enable, |
| 20 | * 3.9 msec clock period (8), reload value (8*3.9ms) |
| 21 | */ |
| 22 | u32 reg = EN_MASK + SRSTEN_MASK + (8 << CLKS_SHIFT) + (8 << LD_SHIFT); |
| 23 | writel(reg, SECWD2_BASE_ADDR); |
| 24 | |
| 25 | while (1) |
| 26 | ; /* loop forever till reset */ |
| 27 | } |