Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / a929b93b01691078a4020e1fc38f227ee85b62ea / . / configs / bitmain_antminer_s9_defconfig
blob: ef5f5676157cb554726c54ee8592645e4fcdc56b [file] [log] [blame]
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]1CONFIG_ARM=y
2CONFIG_SYS_VENDOR="bitmain"
3CONFIG_SYS_BOARD="antminer_s9"
4CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9"
Trevor Woerner43ec7e02019-05-03 09:41:00 -0400[diff] [blame]5CONFIG_SPL_SYS_DCACHE_OFF=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]6CONFIG_ARCH_ZYNQ=y
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]7CONFIG_SYS_TEXT_BASE=0x4000000
Vipul Kumarc5330b42018-07-17 19:00:34 +0530[diff] [blame]8CONFIG_ENV_OFFSET=0x300000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]9CONFIG_DM_GPIO=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]10CONFIG_SPL_STACK_R_ADDR=0x200000
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]11CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]12CONFIG_SPL=y
Michal Simeka932ae72018-06-04 08:33:30 +0200[diff] [blame]13CONFIG_DEBUG_UART_BASE=0xe0001000
14CONFIG_DEBUG_UART_CLOCK=50000000
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]15CONFIG_DEBUG_UART=y
Tom Rinie478f702019-06-02 08:57:32 -0400[diff] [blame]16CONFIG_SYS_CUSTOM_LDSCRIPT=y
17CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]18CONFIG_FIT=y
19CONFIG_FIT_SIGNATURE=y
20CONFIG_FIT_VERBOSE=y
21CONFIG_BOOTDELAY=3
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]22CONFIG_USE_PREBOOT=y
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]23# CONFIG_DISPLAY_CPUINFO is not set
24CONFIG_SPL_STACK_R=y
25CONFIG_HUSH_PARSER=y
26CONFIG_SYS_PROMPT="antminer> "
27CONFIG_CMD_BOOTZ=y
28# CONFIG_CMD_ELF is not set
29# CONFIG_CMD_DM is not set
30# CONFIG_CMD_FLASH is not set
31CONFIG_CMD_FPGA_LOADBP=y
32CONFIG_CMD_FPGA_LOADFS=y
33CONFIG_CMD_FPGA_LOADMK=y
34CONFIG_CMD_FPGA_LOADP=y
35CONFIG_CMD_GPIO=y
36CONFIG_CMD_MMC=y
37CONFIG_CMD_NAND_LOCK_UNLOCK=y
38CONFIG_CMD_PART=y
39# CONFIG_CMD_SETEXPR is not set
40CONFIG_CMD_DHCP=y
41# CONFIG_CMD_NFS is not set
42CONFIG_CMD_MII=y
43CONFIG_CMD_PING=y
44CONFIG_CMD_PXE=y
45CONFIG_CMD_CACHE=y
46CONFIG_CMD_EXT2=y
47CONFIG_CMD_EXT4=y
48CONFIG_CMD_EXT4_WRITE=y
49CONFIG_CMD_FAT=y
50CONFIG_CMD_FS_GENERIC=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]51CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9"
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]52CONFIG_ENV_IS_IN_NAND=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]53CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]54CONFIG_NET_RANDOM_ETHADDR=y
55CONFIG_SPL_DM_SEQ_ALIAS=y
56CONFIG_BOOTCOUNT_LIMIT=y
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]57CONFIG_FPGA_XILINX=y
58CONFIG_FPGA_ZYNQPL=y
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]59CONFIG_MMC_SDHCI=y
60CONFIG_MMC_SDHCI_ZYNQ=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]61CONFIG_MTD=y
Miquel Raynald0935362019-10-03 19:50:03 +0200[diff] [blame]62CONFIG_MTD_RAW_NAND=y
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]63CONFIG_NAND_ZYNQ=y
64CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]65CONFIG_MII=y
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]66CONFIG_ZYNQ_GEM=y
67CONFIG_DEBUG_UART_ZYNQ=y
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]68CONFIG_DEBUG_UART_ANNOUNCE=y
Tom Rini0f73ac62020-06-02 17:26:33 -0400[diff] [blame]69CONFIG_ARM_DCC=y
Ezequiel Garcia00eb01a2018-01-12 12:33:50 -0300[diff] [blame]70CONFIG_ZYNQ_SERIAL=y
71# CONFIG_WATCHDOG is not set
72CONFIG_WDT=y
73CONFIG_WDT_CDNS=y
74# CONFIG_EFI_LOADER is not set