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git01.mediatek.com / filogic / uboot / a901d3d01b7249f0beab18f7b706d30792d6a011 / . / arch / arm / dts / rockchip-radxa-dalang-carrier.dtsi
blob: 26b53eac470688dcc8f7a1eed38a87ac881e156c [file] [log] [blame]
Jagan Teki635727d2020-06-10 16:06:57 +0530[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4 * Copyright (c) 2019 Radxa Limited
5 * Copyright (c) 2019 Amarula Solutions(India)
6 */
7
8#include <dt-bindings/pwm/pwm.h>
9
10/ {
Jagan Tekid523b3d2020-07-21 20:54:35 +0530[diff] [blame]11 clkin_gmac: external-gmac-clock {
12 compatible = "fixed-clock";
13 clock-frequency = <125000000>;
14 clock-output-names = "clkin_gmac";
15 #clock-cells = <0>;
Jagan Teki635727d2020-06-10 16:06:57 +0530[diff] [blame]16 };
Jagan Teki635727d2020-06-10 16:06:57 +0530[diff] [blame]17
Jagan Tekid523b3d2020-07-21 20:54:35 +0530[diff] [blame]18 vcc12v_dcin: vcc12v-dcin-regulator {
19 compatible = "regulator-fixed";
20 regulator-name = "vcc12v_dcin";
21 regulator-always-on;
22 regulator-boot-on;
23 regulator-min-microvolt = <12000000>;
24 regulator-max-microvolt = <12000000>;
25 };
Jagan Teki635727d2020-06-10 16:06:57 +0530[diff] [blame]26
Jagan Tekid523b3d2020-07-21 20:54:35 +0530[diff] [blame]27 vcc5v0_sys: vcc5v0-sys-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vcc5v0_sys";
30 regulator-always-on;
31 regulator-boot-on;
32 regulator-min-microvolt = <5000000>;
33 regulator-max-microvolt = <5000000>;
34 vin-supply = <&vcc12v_dcin>;
35 };
Jagan Teki513673d2020-07-21 20:54:38 +0530[diff] [blame]36
37 vbus_host: vbus-host {
38 compatible = "regulator-fixed";
39 pinctrl-names = "default";
40 pinctrl-0 = <&usb1_en_oc>;
41 regulator-name = "vbus_host"; /* HOST-5V */
42 regulator-always-on;
43 vin-supply = <&vcc5v0_sys>;
44 };
45
46 vbus_typec: vbus-typec {
47 compatible = "regulator-fixed";
48 pinctrl-names = "default";
49 pinctrl-0 = <&usb0_en_oc>;
50 regulator-name = "vbus_typec";
51 regulator-always-on;
52 vin-supply = <&vcc5v0_sys>;
53 };
Jagan Teki635727d2020-06-10 16:06:57 +0530[diff] [blame]54};
55
Jagan Tekid523b3d2020-07-21 20:54:35 +0530[diff] [blame]56&gmac {
57 assigned-clock-parents = <&clkin_gmac>;
58 clock_in_out = "input";
59 phy-mode = "rgmii";
60 pinctrl-names = "default";
61 pinctrl-0 = <&rgmii_pins>;
62 snps,reset-active-low;
63 snps,reset-delays-us = <0 10000 50000>;
64 tx_delay = <0x28>;
65 rx_delay = <0x11>;
Jagan Teki635727d2020-06-10 16:06:57 +0530[diff] [blame]66 status = "okay";
Jagan Teki635727d2020-06-10 16:06:57 +0530[diff] [blame]67};
68
Jagan Tekia901d3d2020-07-21 20:54:39 +0530[diff] [blame^]69&hdmi {
70 status = "okay";
71};
72
Jagan Teki635727d2020-06-10 16:06:57 +0530[diff] [blame]73&pwm0 {
74 status = "okay";
75};
76
77&pwm2 {
78 status = "okay";
79};
80
81&sdmmc {
82 bus-width = <4>;
83 cap-mmc-highspeed;
84 cap-sd-highspeed;
Jagan Teki635727d2020-06-10 16:06:57 +0530[diff] [blame]85 disable-wp;
86 vqmmc-supply = <&vccio_sd>;
Jagan Teki635727d2020-06-10 16:06:57 +0530[diff] [blame]87 pinctrl-names = "default";
88 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
89 status = "okay";
90};
91
92&uart0 {
93 pinctrl-names = "default";
94 pinctrl-0 = <&uart0_xfer &uart0_cts>;
95 status = "okay";
96};
97
98&uart2 {
99 status = "okay";
100};
Jagan Tekia901d3d2020-07-21 20:54:39 +0530[diff] [blame^]101
102&vopb {
103 status = "okay";
104};
105
106&vopb_mmu {
107 status = "okay";
108};
109
110&vopl {
111 status = "okay";
112};
113
114&vopl_mmu {
115 status = "okay";
116};