Jon Loeliger | 194de26 | 2008-03-18 13:51:05 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License |
| 6 | * Version 2 as published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <i2c.h> |
| 11 | |
| 12 | #include <asm/fsl_ddr_sdram.h> |
Haiying Wang | fa44036 | 2008-10-03 12:36:55 -0400 | [diff] [blame] | 13 | #include <asm/fsl_ddr_dimm_params.h> |
Jon Loeliger | 194de26 | 2008-03-18 13:51:05 -0500 | [diff] [blame] | 14 | |
| 15 | static void |
| 16 | get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address) |
| 17 | { |
| 18 | i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t)); |
| 19 | } |
| 20 | |
| 21 | |
| 22 | unsigned int fsl_ddr_get_mem_data_rate(void) |
| 23 | { |
| 24 | return get_ddr_freq(0); |
| 25 | } |
| 26 | |
| 27 | void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd, |
| 28 | unsigned int ctrl_num) |
| 29 | { |
| 30 | unsigned int i; |
| 31 | |
| 32 | if (ctrl_num) { |
| 33 | printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num); |
| 34 | return; |
| 35 | } |
| 36 | |
| 37 | for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { |
| 38 | get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS); |
| 39 | } |
| 40 | } |
| 41 | |
Haiying Wang | fa44036 | 2008-10-03 12:36:55 -0400 | [diff] [blame] | 42 | void fsl_ddr_board_options(memctl_options_t *popts, |
| 43 | dimm_params_t *pdimm, |
| 44 | unsigned int ctrl_num) |
Jon Loeliger | 194de26 | 2008-03-18 13:51:05 -0500 | [diff] [blame] | 45 | { |
| 46 | /* |
| 47 | * Factors to consider for clock adjust: |
| 48 | * - number of chips on bus |
| 49 | * - position of slot |
| 50 | * - DDR1 vs. DDR2? |
| 51 | * - ??? |
| 52 | * |
| 53 | * This needs to be determined on a board-by-board basis. |
| 54 | * 0110 3/4 cycle late |
| 55 | * 0111 7/8 cycle late |
| 56 | */ |
| 57 | popts->clk_adjust = 6; |
| 58 | |
| 59 | /* |
| 60 | * Factors to consider for CPO: |
| 61 | * - frequency |
| 62 | * - ddr1 vs. ddr2 |
| 63 | */ |
| 64 | popts->cpo_override = 10; |
| 65 | |
| 66 | /* |
| 67 | * Factors to consider for write data delay: |
| 68 | * - number of DIMMs |
| 69 | * |
| 70 | * 1 = 1/4 clock delay |
| 71 | * 2 = 1/2 clock delay |
| 72 | * 3 = 3/4 clock delay |
| 73 | * 4 = 1 clock delay |
| 74 | * 5 = 5/4 clock delay |
| 75 | * 6 = 3/2 clock delay |
| 76 | */ |
| 77 | popts->write_data_delay = 3; |
| 78 | |
| 79 | /* |
| 80 | * Factors to consider for half-strength driver enable: |
| 81 | * - number of DIMMs installed |
| 82 | */ |
| 83 | popts->half_strength_driver_enable = 0; |
| 84 | } |