blob: 28383f49da651da61a252fc95876a6db88e23c88 [file] [log] [blame]
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05301/*
Marcel Ziswilerd92dee52016-11-16 17:49:23 +01002 * Copyright 2015-2016 Toradex, Inc.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05303 *
Marcel Ziswilerd92dee52016-11-16 17:49:23 +01004 * Configuration settings for the Toradex VF50/VF61 modules.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05305 *
6 * Based on vf610twr.h:
7 * Copyright 2013 Freescale Semiconductor, Inc.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15#include <asm/arch/imx-regs.h>
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053016
Gong Qianyu52de2e52015-10-26 19:47:42 +080017#define CONFIG_SYS_FSL_CLK
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053018
Marcel Ziswilerd92dee52016-11-16 17:49:23 +010019#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053020
21#define CONFIG_SKIP_LOWLEVEL_INIT
22
23#define CONFIG_CMD_FUSE
24#ifdef CONFIG_CMD_FUSE
25#define CONFIG_MXC_OCOTP
26#endif
27
Stefan Agner13011752017-04-11 11:12:14 +053028#ifdef CONFIG_VIDEO_FSL_DCU_FB
Stefan Agner13011752017-04-11 11:12:14 +053029#define CONFIG_SPLASH_SCREEN_ALIGN
30#define CONFIG_VIDEO_LOGO
31#define CONFIG_VIDEO_BMP_LOGO
32#define CONFIG_SYS_FSL_DCU_LE
33
34#define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
35#define DCU_LAYER_MAX_NUM 64
36#endif
37
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053038/* Size of malloc() pool */
39#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
40
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053041/* Allow to overwrite serial and ethaddr */
42#define CONFIG_ENV_OVERWRITE
Marcel Ziswilerd92dee52016-11-16 17:49:23 +010043#define CONFIG_ENV_VARS_UBOOT_CONFIG
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053044#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053045
46/* NAND support */
47#define CONFIG_CMD_NAND
Stefan Agner4ce682a2015-05-08 19:07:13 +020048#define CONFIG_SYS_NAND_ONFI_DETECTION
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053049#define CONFIG_SYS_MAX_NAND_DEVICE 1
50#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
51
52/* Dynamic MTD partition support */
53#define CONFIG_CMD_MTDPARTS /* Enable 'mtdparts' command line support */
54#define CONFIG_MTD_PARTITIONS
55#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
56#define MTDIDS_DEFAULT "nand0=vf610_nfc"
57#define MTDPARTS_DEFAULT "mtdparts=vf610_nfc:" \
58 "128k(vf-bcb)ro," \
59 "1408k(u-boot)ro," \
60 "512k(u-boot-env)," \
61 "-(ubi)"
62
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053063#define CONFIG_FSL_ESDHC
64#define CONFIG_SYS_FSL_ESDHC_ADDR 0
65#define CONFIG_SYS_FSL_ESDHC_NUM 1
66
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053067#define CONFIG_RBTREE
68#define CONFIG_LZO
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053069#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */
70
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053071#define CONFIG_FEC_MXC
72#define CONFIG_MII
73#define IMX_FEC_BASE ENET1_BASE_ADDR
74#define CONFIG_FEC_XCV_TYPE RMII
75#define CONFIG_FEC_MXC_PHYADDR 0
76#define CONFIG_PHYLIB
77#define CONFIG_PHY_MICREL
78
79#define CONFIG_IPADDR 192.168.10.2
80#define CONFIG_NETMASK 255.255.255.0
81#define CONFIG_SERVERIP 192.168.10.1
82
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053083#define CONFIG_LOADADDR 0x80008000
84#define CONFIG_FDTADDR 0x84000000
85
86/* We boot from the gfxRAM area of the OCRAM. */
87#define CONFIG_SYS_TEXT_BASE 0x3f408000
88#define CONFIG_BOARD_SIZE_LIMIT 524288
89
90#define SD_BOOTCMD \
91 "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \
92 "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \
93 "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
94 "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \
95 "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053096 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053097
98#define NFS_BOOTCMD \
99 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
100 "nfsboot=run setup; " \
101 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
102 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
103 "dhcp ${kernel_addr_r} && " \
104 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +0530105 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530106
107#define UBI_BOOTCMD \
108 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
109 "ubi.fm_autoconvert=1\0" \
110 "ubiboot=run setup; " \
111 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
112 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
Sanchayan Maity27e4e102016-11-25 16:19:17 +0530113 "ubi part ubi && " \
114 "ubi read ${kernel_addr_r} kernel && " \
115 "ubi read ${fdt_addr_r} dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +0530116 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530117
118#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
119
Sanchayan Maity7755e532015-04-17 18:56:42 +0530120#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
121
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530122#define CONFIG_EXTRA_ENV_SETTINGS \
123 "kernel_addr_r=0x82000000\0" \
124 "fdt_addr_r=0x84000000\0" \
125 "kernel_file=zImage\0" \
126 "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \
127 "fdt_board=eval-v3\0" \
Sanchayan Maitya48b4272016-12-02 14:28:27 +0530128 "fdt_fixup=;\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530129 "defargs=\0" \
130 "console=ttyLP0\0" \
131 "setup=setenv setupargs " \
132 "console=tty1 console=${console}" \
133 ",${baudrate}n8 ${memargs}\0" \
134 "setsdupdate=mmc rescan && set interface mmc && " \
135 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
136 "source ${loadaddr}\0" \
137 "setusbupdate=usb start && set interface usb && " \
138 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
139 "source ${loadaddr}\0" \
140 "setupdate=run setsdupdate || run setusbupdate\0" \
141 "mtdparts=" MTDPARTS_DEFAULT "\0" \
Sanchayan Maity7755e532015-04-17 18:56:42 +0530142 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
Stefan Agner13011752017-04-11 11:12:14 +0530143 "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \
144 "splashpos=m,m\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530145 SD_BOOTCMD \
146 NFS_BOOTCMD \
147 UBI_BOOTCMD
148
149/* Miscellaneous configurable options */
150#define CONFIG_SYS_LONGHELP /* undef to save memory */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530151#undef CONFIG_AUTO_COMPLETE
Sanchayan Maity0d92de42015-06-08 12:40:41 +0530152#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530153#define CONFIG_SYS_PBSIZE \
154 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
155#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
156#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
157
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530158#define CONFIG_SYS_MEMTEST_START 0x80010000
159#define CONFIG_SYS_MEMTEST_END 0x87C00000
160
161#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
162#define CONFIG_SYS_HZ 1000
163#define CONFIG_CMDLINE_EDITING
164
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530165/* Physical memory map */
166#define CONFIG_NR_DRAM_BANKS 1
167#define PHYS_SDRAM (0x80000000)
168#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
169
170#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
171#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
172#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
173
174#define CONFIG_SYS_INIT_SP_OFFSET \
175 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
176#define CONFIG_SYS_INIT_SP_ADDR \
177 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
178
179/* Environment organization */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530180
181#ifdef CONFIG_ENV_IS_IN_MMC
182#define CONFIG_SYS_MMC_ENV_DEV 0
183#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
184#define CONFIG_ENV_SIZE (8 * 1024)
185#endif
186
187#ifdef CONFIG_ENV_IS_IN_NAND
188#define CONFIG_ENV_SIZE (64 * 2048)
189#define CONFIG_ENV_RANGE (4 * 64 * 2048)
190#define CONFIG_ENV_OFFSET (12 * 64 * 2048)
191#endif
192
Sanchayan Maity7755e532015-04-17 18:56:42 +0530193/* USB Host Support */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530194#define CONFIG_USB_EHCI_VF
195#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
196#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
197
Sanchayan Maity7755e532015-04-17 18:56:42 +0530198/* USB DFU */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530199#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024)
200
201/* USB Storage */
Paul Kocialkowski045d6052015-06-12 19:56:58 +0200202#define CONFIG_USB_FUNCTION_MASS_STORAGE
Sanchayan Maity7755e532015-04-17 18:56:42 +0530203
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530204#endif /* __CONFIG_H */