blob: 94518a46bfee7ebde711e2d48c434ec7fa6c3fd2 [file] [log] [blame]
Ricardo Ribalda Delgadoa8822a72008-07-17 12:47:09 +02001/*
2 * (C) Copyright 2008
3 * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
4 * This work has been supported by: QTechnology http://qtec.com/
5 * This program is free software: you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16*/
17
18#ifndef __CONFIG_H
19#define __CONFIG_H
20/*
21#define DEBUG
22#define ET_DEBUG
23*/
24 /*CPU*/
25#define CONFIG_XILINX_ML507 1
26#define CONFIG_XILINX_440 1
27#define CONFIG_440 1
28#define CONFIG_4xx 1
29#include "../board/xilinx/ml507/xparameters.h"
30
31/*Mem Map*/
32#define CFG_SDRAM_BASE 0x0
33#define CFG_SDRAM_SIZE_MB 256
34#define CFG_MONITOR_BASE 0x04000000
35#define CFG_MONITOR_LEN ( 192 * 1024 )
36#define CFG_MALLOC_LEN ( 128 * 1024 )
37#define CFG_ISRAM_BASE XPAR_XPS_BRAM_IF_CNTLR_1_BASEADDR
38
39/*Uart*/
40#define CONFIG_XILINX_UARTLITE
41#define CONFIG_BAUDRATE 9600
42#define CFG_BAUDRATE_TABLE {9600}
43#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR
44
45/*Cmd*/
46#include <config_cmd_default.h>
47#define CONFIG_CMD_ASKENV
48#define CONFIG_CMD_CACHE
49#define CONFIG_CMD_DIAG
50#define CONFIG_CMD_ELF
51#define CONFIG_CMD_IRQ
52#define CONFIG_CMD_REGINFO
53#undef CONFIG_CMD_I2C
54#undef CONFIG_CMD_DTT
55#undef CONFIG_CMD_NET
56#undef CONFIG_CMD_PING
57#undef CONFIG_CMD_DHCP
58#undef CONFIG_CMD_EEPROM
59#undef CONFIG_CMD_IMLS
60
61/*Env*/
62#define CFG_ENV_IS_NOWHERE
63#define CFG_ENV_SIZE 0x200
64#define CFG_ENV_OFFSET 0x100
65
66/*Misc*/
67#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
68#define CFG_LONGHELP /* undef to save memory */
69#define CFG_PROMPT "board:/# " /* Monitor Command Prompt */
70#if defined(CONFIG_CMD_KGDB)
71#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
72#else
73#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
74#endif
75#define CFG_PBSIZE ( CFG_CBSIZE + sizeof( CFG_PROMPT ) + 16 )
76#define CFG_MAXARGS 16 /* max number of command args */
77#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
78#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
79#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
80#define CFG_LOAD_ADDR 0x400000 /* default load address */
81#define CFG_EXTBDINFO 1 /* Extended board_into (bd_t) */
82#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
83#define CONFIG_CMDLINE_EDITING /* add command line history */
84#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
85#define CONFIG_LOOPW /* enable loopw command */
86#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */
87#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
88#define CONFIG_VERSION_VARIABLE /* include version env variable */
89#define CFG_CONSOLE_INFO_QUIET /* don't print console @ startup */
90#define CFG_HUSH_PARSER /* Use the HUSH parser */
91#define CFG_PROMPT_HUSH_PS2 "> "
92#define CONFIG_LOADS_ECHO /* echo on for serial download */
93#define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */
94#define CFG_BOOTMAPSZ ( 8 << 20 ) /* Initial Memory map for Linux */
95#define CONFIG_PREBOOT "echo U-Boot is up and runnining;"
96
97/*Stack*/
98#define CFG_INIT_RAM_ADDR 0x800000 /* Initial RAM address */
99#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
100#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
101#define CFG_GBL_DATA_OFFSET ( CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE )
102#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
103/*Speed*/
104#define CONFIG_SYS_CLK_FREQ 400000000
105
106/*Flash*/
107#define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR
108#define CFG_FLASH_SIZE (32*1024*1024)
109#define CFG_FLASH_CFI 1
110#define CFG_FLASH_CFI_DRIVER 1
111#define CFG_FLASH_EMPTY_INFO 1
112#define CFG_MAX_FLASH_BANKS 1
113#define CFG_MAX_FLASH_SECT ( CFG_FLASH_SIZE / ( 64 * 1024 ) )
114#define CFG_FLASH_PROTECTION
115
116#endif /* __CONFIG_H */