blob: 49c94489ee5d2f7d145055b0614f9eacd63f184d [file] [log] [blame]
Ian Campbell6efe3692014-05-05 11:52:26 +01001/*
2 * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Some init for sunxi platform.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#include <common.h>
Ian Campbellba8311f2014-05-05 11:52:28 +010014#include <netdev.h>
15#include <miiphy.h>
Ian Campbell6efe3692014-05-05 11:52:26 +010016#include <serial.h>
17#ifdef CONFIG_SPL_BUILD
18#include <spl.h>
19#endif
20#include <asm/gpio.h>
21#include <asm/io.h>
22#include <asm/arch/clock.h>
23#include <asm/arch/gpio.h>
24#include <asm/arch/sys_proto.h>
25#include <asm/arch/timer.h>
26
27#ifdef CONFIG_SPL_BUILD
28/* Pointer to the global data structure for SPL */
29DECLARE_GLOBAL_DATA_PTR;
30
31/* The sunxi internal brom will try to loader external bootloader
32 * from mmc0, nand flash, mmc2.
33 * Unfortunately we can't check how SPL was loaded so assume
34 * it's always the first SD/MMC controller
35 */
36u32 spl_boot_device(void)
37{
38 return BOOT_DEVICE_MMC1;
39}
40
41/* No confirmation data available in SPL yet. Hardcode bootmode */
42u32 spl_boot_mode(void)
43{
44 return MMCSD_MODE_RAW;
45}
46#endif
47
48int gpio_init(void)
49{
50 sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX);
51 sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX);
52 sunxi_gpio_set_pull(SUNXI_GPB(23), 1);
53
54 return 0;
55}
56
57void reset_cpu(ulong addr)
58{
59}
60
61/* do some early init */
62void s_init(void)
63{
64#if !defined CONFIG_SPL_BUILD && (defined CONFIG_SUN7I || defined CONFIG_SUN6I)
65 /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */
66 asm volatile(
67 "mrc p15, 0, r0, c1, c0, 1\n"
68 "orr r0, r0, #1 << 6\n"
69 "mcr p15, 0, r0, c1, c0, 1\n");
70#endif
71
72 clock_init();
73 timer_init();
74 gpio_init();
75
76#ifdef CONFIG_SPL_BUILD
77 gd = &gdata;
78 preloader_console_init();
79
80 sunxi_board_init();
81#endif
82}
83
84#ifndef CONFIG_SYS_DCACHE_OFF
85void enable_caches(void)
86{
87 /* Enable D-cache. I-cache is already enabled in start.S */
88 dcache_enable();
89}
90#endif
Ian Campbellba8311f2014-05-05 11:52:28 +010091
92#ifdef CONFIG_CMD_NET
93/*
94 * Initializes on-chip ethernet controllers.
95 * to override, implement board_eth_init()
96 */
97int cpu_eth_init(bd_t *bis)
98{
99 int rc;
100
101#ifdef CONFIG_SUNXI_GMAC
102 rc = sunxi_gmac_initialize(bis);
103 if (rc < 0) {
104 printf("sunxi: failed to initialize gmac\n");
105 return rc;
106 }
107#endif
108
109 return 0;
110}
111#endif