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git01.mediatek.com / filogic / uboot / a844b01ea6bfdbef477466c8cd5b2e4fa38b451e / . / arch / arm / dts / Makefile
blob: 55546152b94b3be201b266683cb5213a5d5c6b8b [file] [log] [blame]
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100[diff] [blame]1dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
Piotr Wilczek4efd33a2014-03-07 14:59:48 +0100[diff] [blame]2 exynos4210-universal_c210.dtb \
Piotr Wilczek87d2e782014-03-07 14:59:49 +0100[diff] [blame]3 exynos4210-trats.dtb \
4 exynos4412-trats2.dtb
Piotr Wilczekeb68f442014-03-07 14:59:46 +0100[diff] [blame]5
Masahiro Yamadae7a579f2014-02-05 11:28:27 +0900[diff] [blame]6dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
7 exynos5250-snow.dtb \
8 exynos5250-smdk5250.dtb \
9 exynos5420-smdk5420.dtb
Stefano Babicf423e062014-03-31 09:50:36 +0200[diff] [blame]10dtb-$(CONFIG_MX6) += imx6q-sabreauto.dtb
Masahiro Yamadae7a579f2014-02-05 11:28:27 +0900[diff] [blame]11dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
12 tegra20-medcom-wide.dtb \
13 tegra20-paz00.dtb \
14 tegra20-plutux.dtb \
15 tegra20-seaboard.dtb \
16 tegra20-tec.dtb \
17 tegra20-trimslice.dtb \
18 tegra20-ventana.dtb \
19 tegra20-whistler.dtb \
20 tegra20-colibri_t20_iris.dtb \
21 tegra30-beaver.dtb \
22 tegra30-cardhu.dtb \
23 tegra30-tec-ng.dtb \
Masahiro Yamada8dcaef82014-02-20 17:18:42 +0900[diff] [blame]24 tegra114-dalmore.dtb \
Stephen Warrena844b012014-03-25 11:39:33 -0600[diff] [blame^]25 tegra124-jetson-tk1.dtb \
Masahiro Yamada8dcaef82014-02-20 17:18:42 +0900[diff] [blame]26 tegra124-venice2.dtb
Masahiro Yamadae7a579f2014-02-05 11:28:27 +0900[diff] [blame]27dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \
28 zynq-zc706.dtb \
29 zynq-zed.dtb \
30 zynq-microzed.dtb \
31 zynq-zc770-xm010.dtb \
32 zynq-zc770-xm012.dtb \
33 zynq-zc770-xm013.dtb
34
35targets += $(dtb-y)
36
37DTC_FLAGS += -R 4 -p 0x1000
38
39PHONY += dtbs
40dtbs: $(addprefix $(obj)/, $(dtb-y))
41 @:
42
43clean-files := *.dtb