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Michal Simek6455ac02007-05-05 18:27:16 +02001/*
2 * (C) Copyright 2007 Michal Simek
3 *
4 * Michal SIMEK <monstr@monstr.eu>
5 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
Michal Simek6455ac02007-05-05 18:27:16 +02007 */
8
9/* FSL macros */
10#define NGET(val, fslnum) \
11 __asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val));
Michal Simekee1aced2007-05-08 14:39:11 +020012
Michal Simek6455ac02007-05-05 18:27:16 +020013#define GET(val, fslnum) \
14 __asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val));
Michal Simekee1aced2007-05-08 14:39:11 +020015
16#define NCGET(val, fslnum) \
17 __asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val));
18
19#define CGET(val, fslnum) \
20 __asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val));
21
Michal Simek6455ac02007-05-05 18:27:16 +020022#define NPUT(val, fslnum) \
23 __asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val));
Michal Simekee1aced2007-05-08 14:39:11 +020024
Michal Simek6455ac02007-05-05 18:27:16 +020025#define PUT(val, fslnum) \
26 __asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val));
Michal Simek603aa742007-05-07 17:11:09 +020027
Michal Simekee1aced2007-05-08 14:39:11 +020028#define NCPUT(val, fslnum) \
29 __asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val));
30
31#define CPUT(val, fslnum) \
32 __asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val));
33
Michal Simek6455ac02007-05-05 18:27:16 +020034/* CPU dependent */
Michal Simek3af398e2007-05-08 14:52:52 +020035/* machine status register */
Michal Simekebf7b232007-05-08 15:57:43 +020036#define MFS(val, reg) \
37 __asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
Michal Simek603aa742007-05-07 17:11:09 +020038
Michal Simekebf7b232007-05-08 15:57:43 +020039#define MTS(val, reg) \
40 __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
Michal Simek3af398e2007-05-08 14:52:52 +020041
Michal Simek98c19792007-05-07 23:58:31 +020042/* get return address from interrupt */
Michal Simek603aa742007-05-07 17:11:09 +020043#define R14(val) \
44 __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
Michal Simek98c19792007-05-07 23:58:31 +020045
Michal Simekebf7b232007-05-08 15:57:43 +020046#define NOP __asm__ __volatile__ ("nop");
47
Michal Simek98c19792007-05-07 23:58:31 +020048/* use machine status registe USE_MSR_REG */
Michal Simek736245c2011-02-07 10:30:45 +010049#if XILINX_USE_MSR_INSTR == 1
Michal Simek98c19792007-05-07 23:58:31 +020050#define MSRSET(val) \
51 __asm__ __volatile__ ("msrset r0," #val );
52
53#define MSRCLR(val) \
54 __asm__ __volatile__ ("msrclr r0," #val );
55
56#else
57#define MSRSET(val) \
58{ \
59 register unsigned tmp; \
60 __asm__ __volatile__ (" \
Wolfgang Denka1be4762008-05-20 16:00:29 +020061 mfs %0, rmsr; \
Michal Simek98c19792007-05-07 23:58:31 +020062 ori %0, %0, "#val"; \
63 mts rmsr, %0; \
64 nop;" \
65 : "=r" (tmp) \
66 : "d" (val) \
67 : "memory"); \
68}
69
70#define MSRCLR(val) \
71{ \
72 register unsigned tmp; \
73 __asm__ __volatile__ (" \
Wolfgang Denka1be4762008-05-20 16:00:29 +020074 mfs %0, rmsr; \
Michal Simek98c19792007-05-07 23:58:31 +020075 andi %0, %0, ~"#val"; \
76 mts rmsr, %0; \
77 nop;" \
78 : "=r" (tmp) \
79 : "d" (val) \
80 : "memory"); \
81}
82#endif