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Michal Simek0cf97aa2015-07-22 10:47:33 +02001Cadence SPI controller Device Tree Bindings
2-------------------------------------------
Jagan Tekic30d1832015-06-27 00:51:33 +05303
4Required properties:
Michal Simek0cf97aa2015-07-22 10:47:33 +02005- compatible : Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6".
Jagan Tekic30d1832015-06-27 00:51:33 +05306- reg : Physical base address and size of SPI registers map.
Jagan Tekic30d1832015-06-27 00:51:33 +05307- interrupts : Property with a value describing the interrupt
8 number.
Michal Simek0cf97aa2015-07-22 10:47:33 +02009- interrupt-parent : Must be core interrupt controller
Jagan Tekic30d1832015-06-27 00:51:33 +053010- clock-names : List of input clock names - "ref_clk", "pclk"
11 (See clock bindings for details).
Michal Simek0cf97aa2015-07-22 10:47:33 +020012- clocks : Clock phandles (see clock bindings for details).
Jagan Teki82081632015-06-27 00:51:34 +053013- spi-max-frequency : Maximum SPI clocking speed of device in Hz
Jagan Tekic30d1832015-06-27 00:51:33 +053014
Michal Simek0cf97aa2015-07-22 10:47:33 +020015Optional properties:
16- num-cs : Number of chip selects used.
17 If a decoder is used, this will be the number of
18 chip selects after the decoder.
19- is-decoded-cs : Flag to indicate whether decoder is used or not.
20
Jagan Tekic30d1832015-06-27 00:51:33 +053021Example:
22
Michal Simek0cf97aa2015-07-22 10:47:33 +020023 spi@e0007000 {
24 compatible = "xlnx,zynq-spi-r1p6";
Jagan Tekic30d1832015-06-27 00:51:33 +053025 clock-names = "ref_clk", "pclk";
Michal Simek0cf97aa2015-07-22 10:47:33 +020026 clocks = <&clkc 26>, <&clkc 35>;
27 interrupt-parent = <&intc>;
28 interrupts = <0 49 4>;
29 num-cs = <4>;
30 is-decoded-cs = <0>;
31 reg = <0xe0007000 0x1000>;
Jagan Tekic30d1832015-06-27 00:51:33 +053032 } ;