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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Vasut12a8d792015-06-23 15:54:19 +02002/*
3 * (C) Copyright 2015 Marek Vasut <marex@denx.de>
4 *
5 * DesignWare APB GPIO driver
Marek Vasut12a8d792015-06-23 15:54:19 +02006 */
7
8#include <common.h>
9#include <malloc.h>
10#include <asm/arch/gpio.h>
11#include <asm/gpio.h>
12#include <asm/io.h>
13#include <dm.h>
14#include <dm/device-internal.h>
15#include <dm/lists.h>
16#include <dm/root.h>
17#include <errno.h>
Ley Foon Tana804dd02018-09-04 14:04:58 +080018#include <reset.h>
Marek Vasut12a8d792015-06-23 15:54:19 +020019
20DECLARE_GLOBAL_DATA_PTR;
21
Phil Edworthy26c43ca2016-11-03 11:05:12 +000022#define GPIO_SWPORT_DR(p) (0x00 + (p) * 0xc)
23#define GPIO_SWPORT_DDR(p) (0x04 + (p) * 0xc)
Marek Vasut12a8d792015-06-23 15:54:19 +020024#define GPIO_INTEN 0x30
25#define GPIO_INTMASK 0x34
26#define GPIO_INTTYPE_LEVEL 0x38
27#define GPIO_INT_POLARITY 0x3c
28#define GPIO_INTSTATUS 0x40
29#define GPIO_PORTA_DEBOUNCE 0x48
30#define GPIO_PORTA_EOI 0x4c
Phil Edworthy26c43ca2016-11-03 11:05:12 +000031#define GPIO_EXT_PORT(p) (0x50 + (p) * 4)
Marek Vasut12a8d792015-06-23 15:54:19 +020032
Ley Foon Tana804dd02018-09-04 14:04:58 +080033struct gpio_dwapb_priv {
34 struct reset_ctl_bulk resets;
35};
36
Marek Vasut12a8d792015-06-23 15:54:19 +020037struct gpio_dwapb_platdata {
38 const char *name;
39 int bank;
40 int pins;
41 fdt_addr_t base;
42};
43
44static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)
45{
46 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
47
Phil Edworthy26c43ca2016-11-03 11:05:12 +000048 clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
Marek Vasut12a8d792015-06-23 15:54:19 +020049 return 0;
50}
51
52static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin,
53 int val)
54{
55 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
56
Phil Edworthy26c43ca2016-11-03 11:05:12 +000057 setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
Marek Vasut12a8d792015-06-23 15:54:19 +020058
59 if (val)
Phil Edworthy26c43ca2016-11-03 11:05:12 +000060 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
Marek Vasut12a8d792015-06-23 15:54:19 +020061 else
Phil Edworthy26c43ca2016-11-03 11:05:12 +000062 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
Marek Vasut12a8d792015-06-23 15:54:19 +020063
64 return 0;
65}
66
67static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
68{
69 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
Phil Edworthy26c43ca2016-11-03 11:05:12 +000070 return !!(readl(plat->base + GPIO_EXT_PORT(plat->bank)) & (1 << pin));
Marek Vasut12a8d792015-06-23 15:54:19 +020071}
72
73
74static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)
75{
76 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
77
78 if (val)
Phil Edworthy26c43ca2016-11-03 11:05:12 +000079 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
Marek Vasut12a8d792015-06-23 15:54:19 +020080 else
Phil Edworthy26c43ca2016-11-03 11:05:12 +000081 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
Marek Vasut12a8d792015-06-23 15:54:19 +020082
83 return 0;
84}
85
Ley Foon Tana4f80b72018-08-16 13:46:30 +080086static int dwapb_gpio_get_function(struct udevice *dev, unsigned offset)
87{
88 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
89 u32 gpio;
90
91 gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank));
92
93 if (gpio & BIT(offset))
94 return GPIOF_OUTPUT;
95 else
96 return GPIOF_INPUT;
97}
98
Marek Vasut12a8d792015-06-23 15:54:19 +020099static const struct dm_gpio_ops gpio_dwapb_ops = {
100 .direction_input = dwapb_gpio_direction_input,
101 .direction_output = dwapb_gpio_direction_output,
102 .get_value = dwapb_gpio_get_value,
103 .set_value = dwapb_gpio_set_value,
Ley Foon Tana4f80b72018-08-16 13:46:30 +0800104 .get_function = dwapb_gpio_get_function,
Marek Vasut12a8d792015-06-23 15:54:19 +0200105};
106
Ley Foon Tana804dd02018-09-04 14:04:58 +0800107static int gpio_dwapb_reset(struct udevice *dev)
108{
109 int ret;
110 struct gpio_dwapb_priv *priv = dev_get_priv(dev);
111
112 ret = reset_get_bulk(dev, &priv->resets);
113 if (ret) {
114 /* Return 0 if error due to !CONFIG_DM_RESET and reset
115 * DT property is not present.
116 */
117 if (ret == -ENOENT || ret == -ENOTSUPP)
118 return 0;
119
120 dev_warn(dev, "Can't get reset: %d\n", ret);
121 return ret;
122 }
123
124 ret = reset_deassert_bulk(&priv->resets);
125 if (ret) {
126 reset_release_bulk(&priv->resets);
127 dev_err(dev, "Failed to reset: %d\n", ret);
128 return ret;
129 }
130
131 return 0;
132}
133
Marek Vasut12a8d792015-06-23 15:54:19 +0200134static int gpio_dwapb_probe(struct udevice *dev)
135{
136 struct gpio_dev_priv *priv = dev_get_uclass_priv(dev);
137 struct gpio_dwapb_platdata *plat = dev->platdata;
138
Ley Foon Tana804dd02018-09-04 14:04:58 +0800139 if (!plat) {
140 /* Reset on parent device only */
141 return gpio_dwapb_reset(dev);
142 }
Marek Vasut12a8d792015-06-23 15:54:19 +0200143
144 priv->gpio_count = plat->pins;
145 priv->bank_name = plat->name;
146
147 return 0;
148}
149
150static int gpio_dwapb_bind(struct udevice *dev)
151{
152 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
153 const void *blob = gd->fdt_blob;
154 struct udevice *subdev;
155 fdt_addr_t base;
156 int ret, node, bank = 0;
157
158 /* If this is a child device, there is nothing to do here */
159 if (plat)
160 return 0;
161
Simon Glassdd79d6e2017-01-17 16:52:55 -0700162 base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg");
Marek Vasut12a8d792015-06-23 15:54:19 +0200163 if (base == FDT_ADDR_T_NONE) {
164 debug("Can't get the GPIO register base address\n");
165 return -ENXIO;
166 }
167
Simon Glassdd79d6e2017-01-17 16:52:55 -0700168 for (node = fdt_first_subnode(blob, dev_of_offset(dev));
Marek Vasut12a8d792015-06-23 15:54:19 +0200169 node > 0;
170 node = fdt_next_subnode(blob, node)) {
171 if (!fdtdec_get_bool(blob, node, "gpio-controller"))
172 continue;
173
174 plat = NULL;
175 plat = calloc(1, sizeof(*plat));
176 if (!plat)
177 return -ENOMEM;
178
179 plat->base = base;
180 plat->bank = bank;
181 plat->pins = fdtdec_get_int(blob, node, "snps,nr-gpios", 0);
Simon Glassb0ea7402016-10-02 17:59:28 -0600182 plat->name = fdt_stringlist_get(blob, node, "bank-name", 0,
183 NULL);
Marek Vasut12a8d792015-06-23 15:54:19 +0200184 if (ret)
185 goto err;
186
187 ret = device_bind(dev, dev->driver, plat->name,
188 plat, -1, &subdev);
189 if (ret)
190 goto err;
191
Simon Glassdd79d6e2017-01-17 16:52:55 -0700192 dev_set_of_offset(subdev, node);
Marek Vasut12a8d792015-06-23 15:54:19 +0200193 bank++;
194 }
195
196 return 0;
197
198err:
199 free(plat);
200 return ret;
201}
202
Ley Foon Tana804dd02018-09-04 14:04:58 +0800203static int gpio_dwapb_remove(struct udevice *dev)
204{
205 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
206 struct gpio_dwapb_priv *priv = dev_get_priv(dev);
207
208 if (!plat && priv)
209 return reset_release_bulk(&priv->resets);
210
211 return 0;
212}
213
Marek Vasut12a8d792015-06-23 15:54:19 +0200214static const struct udevice_id gpio_dwapb_ids[] = {
215 { .compatible = "snps,dw-apb-gpio" },
216 { }
217};
218
219U_BOOT_DRIVER(gpio_dwapb) = {
220 .name = "gpio-dwapb",
221 .id = UCLASS_GPIO,
222 .of_match = gpio_dwapb_ids,
223 .ops = &gpio_dwapb_ops,
224 .bind = gpio_dwapb_bind,
225 .probe = gpio_dwapb_probe,
Ley Foon Tana804dd02018-09-04 14:04:58 +0800226 .remove = gpio_dwapb_remove,
227 .priv_auto_alloc_size = sizeof(struct gpio_dwapb_priv),
Marek Vasut12a8d792015-06-23 15:54:19 +0200228};