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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Michal Simekaf482d52012-09-28 09:56:37 +00002/*
3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
Michal Simek98d0f1f2018-01-17 07:37:47 +01004 * (C) Copyright 2013 - 2018 Xilinx, Inc.
Michal Simekaf482d52012-09-28 09:56:37 +00005 */
6
7#include <common.h>
Michal Simek309ef802018-02-21 17:04:28 +01008#include <dm/uclass.h>
Michal Simek65ef52f2014-02-24 11:16:32 +01009#include <fdtdec.h>
Michal Simek0f796702014-04-25 13:51:17 +020010#include <fpga.h>
Siva Durga Prasad Paladugubd75bc12019-01-25 17:06:06 +053011#include <malloc.h>
Michal Simek0f796702014-04-25 13:51:17 +020012#include <mmc.h>
Michal Simekc07b2252018-06-08 13:45:14 +020013#include <watchdog.h>
Michal Simek309ef802018-02-21 17:04:28 +010014#include <wdt.h>
Michal Simek15d654c2013-04-22 15:43:02 +020015#include <zynqpl.h>
Michal Simek242192b2013-04-12 16:33:08 +020016#include <asm/arch/hardware.h>
17#include <asm/arch/sys_proto.h>
Michal Simekaf482d52012-09-28 09:56:37 +000018
19DECLARE_GLOBAL_DATA_PTR;
20
Michal Simek309ef802018-02-21 17:04:28 +010021#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
22static struct udevice *watchdog_dev;
23#endif
24
25#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F)
26int board_early_init_f(void)
27{
28# if defined(CONFIG_WDT)
29 /* bss is not cleared at time when watchdog_reset() is called */
30 watchdog_dev = NULL;
31# endif
32
33 return 0;
34}
35#endif
36
Michal Simekaf482d52012-09-28 09:56:37 +000037int board_init(void)
38{
Michal Simek309ef802018-02-21 17:04:28 +010039#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
Michal Simek41e905b2018-07-11 08:35:22 +020040 if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
41 debug("Watchdog: Not found by seq!\n");
42 if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
43 puts("Watchdog: Not found!\n");
44 return 0;
45 }
Michal Simek309ef802018-02-21 17:04:28 +010046 }
Michal Simek41e905b2018-07-11 08:35:22 +020047
48 wdt_start(watchdog_dev, 0, 0);
49 puts("Watchdog: Started\n");
Michal Simek309ef802018-02-21 17:04:28 +010050# endif
51
Michal Simekaf482d52012-09-28 09:56:37 +000052 return 0;
53}
54
Jagannadha Sutradharudu Teki11704c22014-01-09 01:48:21 +053055int board_late_init(void)
56{
Siva Durga Prasad Paladugubd75bc12019-01-25 17:06:06 +053057 int env_targets_len = 0;
58 const char *mode;
59 char *new_targets;
60 char *env_targets;
61
Jagannadha Sutradharudu Teki11704c22014-01-09 01:48:21 +053062 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
Michal Simek19356712016-12-16 13:16:14 +010063 case ZYNQ_BM_QSPI:
Siva Durga Prasad Paladugubd75bc12019-01-25 17:06:06 +053064 mode = "qspi";
Simon Glass6a38e412017-08-03 12:22:09 -060065 env_set("modeboot", "qspiboot");
Michal Simek19356712016-12-16 13:16:14 +010066 break;
67 case ZYNQ_BM_NAND:
Siva Durga Prasad Paladugubd75bc12019-01-25 17:06:06 +053068 mode = "nand";
Simon Glass6a38e412017-08-03 12:22:09 -060069 env_set("modeboot", "nandboot");
Michal Simek19356712016-12-16 13:16:14 +010070 break;
Jagannadha Sutradharudu Teki11704c22014-01-09 01:48:21 +053071 case ZYNQ_BM_NOR:
Siva Durga Prasad Paladugubd75bc12019-01-25 17:06:06 +053072 mode = "nor";
Simon Glass6a38e412017-08-03 12:22:09 -060073 env_set("modeboot", "norboot");
Jagannadha Sutradharudu Teki11704c22014-01-09 01:48:21 +053074 break;
75 case ZYNQ_BM_SD:
Siva Durga Prasad Paladugubd75bc12019-01-25 17:06:06 +053076 mode = "mmc";
Simon Glass6a38e412017-08-03 12:22:09 -060077 env_set("modeboot", "sdboot");
Jagannadha Sutradharudu Teki11704c22014-01-09 01:48:21 +053078 break;
79 case ZYNQ_BM_JTAG:
Siva Durga Prasad Paladugubd75bc12019-01-25 17:06:06 +053080 mode = "pxe dhcp";
Simon Glass6a38e412017-08-03 12:22:09 -060081 env_set("modeboot", "jtagboot");
Jagannadha Sutradharudu Teki11704c22014-01-09 01:48:21 +053082 break;
83 default:
Siva Durga Prasad Paladugubd75bc12019-01-25 17:06:06 +053084 mode = "";
Simon Glass6a38e412017-08-03 12:22:09 -060085 env_set("modeboot", "");
Jagannadha Sutradharudu Teki11704c22014-01-09 01:48:21 +053086 break;
87 }
88
Siva Durga Prasad Paladugubd75bc12019-01-25 17:06:06 +053089 /*
90 * One terminating char + one byte for space between mode
91 * and default boot_targets
92 */
93 env_targets = env_get("boot_targets");
94 if (env_targets)
95 env_targets_len = strlen(env_targets);
96
97 new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
98 if (!new_targets)
99 return -ENOMEM;
100
101 sprintf(new_targets, "%s %s", mode,
102 env_targets ? env_targets : "");
103
104 env_set("boot_targets", new_targets);
105
Jagannadha Sutradharudu Teki11704c22014-01-09 01:48:21 +0530106 return 0;
107}
Michal Simekaf482d52012-09-28 09:56:37 +0000108
Michal Simekf4780a72016-04-01 15:56:33 +0200109#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
Simon Glass2f949c32017-03-31 08:40:32 -0600110int dram_init_banksize(void)
Nathan Rossic12892b2016-12-04 19:33:22 +1000111{
Michal Simekd5b7de62017-11-03 15:25:51 +0100112 return fdtdec_setup_memory_banksize();
Tom Riniedcfdbd2016-12-09 07:56:54 -0500113}
Michal Simekf4780a72016-04-01 15:56:33 +0200114
Tom Riniedcfdbd2016-12-09 07:56:54 -0500115int dram_init(void)
116{
Siva Durga Prasad Paladugub3d55ea2018-07-16 15:56:11 +0530117 if (fdtdec_setup_mem_size_base() != 0)
Nathan Rossi58ea0d82016-12-19 00:03:34 +1000118 return -EINVAL;
Tom Riniedcfdbd2016-12-09 07:56:54 -0500119
120 zynq_ddrc_init();
121
122 return 0;
Michal Simekf4780a72016-04-01 15:56:33 +0200123}
Michal Simekf4780a72016-04-01 15:56:33 +0200124#else
125int dram_init(void)
126{
Michal Simek1b846212018-04-11 16:12:28 +0200127 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
128 CONFIG_SYS_SDRAM_SIZE);
Michal Simekf4780a72016-04-01 15:56:33 +0200129
Michal Simekf5ff7bc2013-06-17 14:37:01 +0200130 zynq_ddrc_init();
131
Michal Simekaf482d52012-09-28 09:56:37 +0000132 return 0;
133}
Michal Simekf4780a72016-04-01 15:56:33 +0200134#endif
Michal Simek309ef802018-02-21 17:04:28 +0100135
136#if defined(CONFIG_WATCHDOG)
137/* Called by macro WATCHDOG_RESET */
138void watchdog_reset(void)
139{
140# if !defined(CONFIG_SPL_BUILD)
141 static ulong next_reset;
142 ulong now;
143
144 if (!watchdog_dev)
145 return;
146
147 now = timer_get_us();
148
149 /* Do not reset the watchdog too often */
150 if (now > next_reset) {
151 wdt_reset(watchdog_dev);
152 next_reset = now + 1000;
153 }
154# endif
155}
156#endif