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Peter Baradae5b77e62011-12-19 19:54:51 +00001/*
2 * (C) Copyright 2011
3 * Logic Product Development <www.logicpd.com>
4 *
5 * Author :
6 * Peter Barada <peter.barada@logicpd.com>
7 *
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
11 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020012 * SPDX-License-Identifier: GPL-2.0+
Peter Baradae5b77e62011-12-19 19:54:51 +000013 */
14#include <common.h>
Adam Ford04c848a2015-09-02 09:18:20 -050015#include <dm.h>
16#include <ns16550.h>
Peter Baradae5b77e62011-12-19 19:54:51 +000017#include <netdev.h>
18#include <flash.h>
19#include <nand.h>
20#include <i2c.h>
21#include <twl4030.h>
22#include <asm/io.h>
23#include <asm/arch/mmc_host_def.h>
24#include <asm/arch/mux.h>
25#include <asm/arch/mem.h>
26#include <asm/arch/sys_proto.h>
27#include <asm/gpio.h>
28#include <asm/mach-types.h>
Masahiro Yamada2b7a8732017-11-30 13:45:24 +090029#include <linux/mtd/rawnand.h>
Adam Fordd76b69c2016-01-31 13:34:39 -060030#include <asm/omap_musb.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090031#include <linux/errno.h>
Adam Fordd76b69c2016-01-31 13:34:39 -060032#include <linux/usb/ch9.h>
33#include <linux/usb/gadget.h>
34#include <linux/usb/musb.h>
Peter Baradae5b77e62011-12-19 19:54:51 +000035#include "omap3logic.h"
Adam Ford0c5b44f2017-08-13 07:36:14 -050036#ifdef CONFIG_USB_EHCI_HCD
37#include <usb.h>
38#include <asm/ehci-omap.h>
39#endif
Peter Baradae5b77e62011-12-19 19:54:51 +000040
41DECLARE_GLOBAL_DATA_PTR;
42
Adam Ford55bdf922017-04-17 08:09:45 -050043/* This is only needed until SPL gets OF support */
44#ifdef CONFIG_SPL_BUILD
Adam Ford04c848a2015-09-02 09:18:20 -050045static const struct ns16550_platdata omap3logic_serial = {
Adam Fordd1e22fa2016-03-07 21:08:49 -060046 .base = OMAP34XX_UART1,
47 .reg_shift = 2,
Heiko Schocher06f108e2017-01-18 08:05:49 +010048 .clock = V_NS16550_CLK,
49 .fcr = UART_FCR_DEFVAL,
Adam Ford04c848a2015-09-02 09:18:20 -050050};
51
52U_BOOT_DEVICE(omap3logic_uart) = {
Thomas Chou52ac4432015-11-19 21:48:12 +080053 "ns16550_serial",
Adam Ford04c848a2015-09-02 09:18:20 -050054 &omap3logic_serial
55};
Adam Ford55bdf922017-04-17 08:09:45 -050056#endif
Adam Ford04c848a2015-09-02 09:18:20 -050057
Adam Ford55bdf922017-04-17 08:09:45 -050058/*
59 * two dimensional array of strucures containining board name and Linux
60 * machine IDs; row it selected based on CPU column is slected based
61 * on hsusb0_data5 pin having a pulldown resistor
62 */
Peter Baradae5b77e62011-12-19 19:54:51 +000063static struct board_id {
64 char *name;
65 int machine_id;
Tom Rini3a23c422017-01-10 17:22:05 -050066 char *fdtfile;
Peter Baradae5b77e62011-12-19 19:54:51 +000067} boards[2][2] = {
68 {
69 {
70 .name = "OMAP35xx SOM LV",
71 .machine_id = MACH_TYPE_OMAP3530_LV_SOM,
Tom Rini3a23c422017-01-10 17:22:05 -050072 .fdtfile = "logicpd-som-lv-35xx-devkit.dtb",
Peter Baradae5b77e62011-12-19 19:54:51 +000073 },
74 {
75 .name = "OMAP35xx Torpedo",
76 .machine_id = MACH_TYPE_OMAP3_TORPEDO,
Tom Rini3a23c422017-01-10 17:22:05 -050077 .fdtfile = "logicpd-torpedo-35xx-devkit.dtb",
Peter Baradae5b77e62011-12-19 19:54:51 +000078 },
79 },
80 {
81 {
82 .name = "DM37xx SOM LV",
Tom Rini3a23c422017-01-10 17:22:05 -050083 .fdtfile = "logicpd-som-lv-37xx-devkit.dtb",
Peter Baradae5b77e62011-12-19 19:54:51 +000084 },
85 {
86 .name = "DM37xx Torpedo",
Tom Rini3a23c422017-01-10 17:22:05 -050087 .fdtfile = "logicpd-torpedo-37xx-devkit.dtb",
Peter Baradae5b77e62011-12-19 19:54:51 +000088 },
89 },
90};
91
Adam Ford5326c292016-01-29 20:12:34 -060092#ifdef CONFIG_SPL_OS_BOOT
93int spl_start_uboot(void)
94{
95 /* break into full u-boot on 'c' */
96 return serial_tstc() && serial_getc() == 'c';
97}
98#endif
99
100#if defined(CONFIG_SPL_BUILD)
101/*
102 * Routine: get_board_mem_timings
103 * Description: If we use SPL then there is no x-loader nor config header
104 * so we have to setup the DDR timings ourself on the first bank. This
105 * provides the timing values back to the function that configures
106 * the memory.
107 */
108void get_board_mem_timings(struct board_sdrc_timings *timings)
109{
110 timings->mr = MICRON_V_MR_165;
111 /* 256MB DDR */
112 timings->mcfg = MICRON_V_MCFG_200(256 << 20);
113 timings->ctrla = MICRON_V_ACTIMA_200;
114 timings->ctrlb = MICRON_V_ACTIMB_200;
115 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
116}
Adam Ford9968e4a2017-12-04 17:54:50 -0600117
118#define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE + 0x7c)
119#define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE + 0x84)
120#define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE + 0x80)
121
122void spl_board_prepare_for_linux(void)
123{
124 /* The Micron NAND starts locked which
125 * prohibits mounting the NAND as RW
126 * The following commands are what unlocks
127 * the NAND to become RW Falcon Mode does not
128 * have as many smarts as U-Boot, but Logic PD
129 * only makes NAND with 512MB so these hard coded
130 * values should work for all current models
131 */
132
133 writeb(0x70, GPMC_NAND_COMMAND_0);
134 writeb(-1, GPMC_NAND_DATA_0);
135 writeb(0x7a, GPMC_NAND_COMMAND_0);
136 writeb(0x00, GPMC_NAND_ADDRESS_0);
137 writeb(0x00, GPMC_NAND_ADDRESS_0);
138 writeb(0x00, GPMC_NAND_ADDRESS_0);
139 writeb(-1, GPMC_NAND_COMMAND_0);
140
141 /* Begin address 0 */
142 writeb(NAND_CMD_UNLOCK1, 0x6e00007c);
143 writeb(0x00, GPMC_NAND_ADDRESS_0);
144 writeb(0x00, GPMC_NAND_ADDRESS_0);
145 writeb(0x00, GPMC_NAND_ADDRESS_0);
146 writeb(-1, GPMC_NAND_DATA_0);
147
148 /* Ending address at the end of Flash */
149 writeb(NAND_CMD_UNLOCK2, GPMC_NAND_COMMAND_0);
150 writeb(0xc0, GPMC_NAND_ADDRESS_0);
151 writeb(0xff, GPMC_NAND_ADDRESS_0);
152 writeb(0x03, GPMC_NAND_ADDRESS_0);
153 writeb(-1, GPMC_NAND_DATA_0);
154 writeb(0x79, GPMC_NAND_COMMAND_0);
155 writeb(-1, GPMC_NAND_DATA_0);
156 writeb(-1, GPMC_NAND_DATA_0);
157}
Adam Ford5326c292016-01-29 20:12:34 -0600158#endif
159
Adam Fordd76b69c2016-01-31 13:34:39 -0600160#ifdef CONFIG_USB_MUSB_OMAP2PLUS
161static struct musb_hdrc_config musb_config = {
162 .multipoint = 1,
163 .dyn_fifo = 1,
164 .num_eps = 16,
165 .ram_bits = 12,
166};
167
168static struct omap_musb_board_data musb_board_data = {
169 .interface_type = MUSB_INTERFACE_ULPI,
170};
171
172static struct musb_hdrc_platform_data musb_plat = {
173#if defined(CONFIG_USB_MUSB_HOST)
174 .mode = MUSB_HOST,
175#elif defined(CONFIG_USB_MUSB_GADGET)
176 .mode = MUSB_PERIPHERAL,
177#else
178#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
179#endif
180 .config = &musb_config,
181 .power = 100,
182 .platform_ops = &omap2430_ops,
183 .board_data = &musb_board_data,
184};
185#endif
186
Adam Ford0c5b44f2017-08-13 07:36:14 -0500187#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
188/* Call usb_stop() before starting the kernel */
189void show_boot_progress(int val)
190{
191 if (val == BOOTSTAGE_ID_RUN_OS)
192 usb_stop();
193}
194
195static struct omap_usbhs_board_data usbhs_bdata = {
196 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
197 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
198 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
199};
200
201int ehci_hcd_init(int index, enum usb_init_type init,
202 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
203{
204 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
205}
206
207int ehci_hcd_stop(int index)
208{
209 return omap_ehci_hcd_stop();
210}
211
212#endif /* CONFIG_USB_EHCI_HCD */
213
Adam Fordd76b69c2016-01-31 13:34:39 -0600214
Adam Ford5326c292016-01-29 20:12:34 -0600215/*
216 * Routine: misc_init_r
217 * Description: Configure board specific parts
218 */
219int misc_init_r(void)
220{
Adam Ford5326c292016-01-29 20:12:34 -0600221 twl4030_power_init();
Adam Ford5326c292016-01-29 20:12:34 -0600222 omap_die_id_display();
Adam Ford5326c292016-01-29 20:12:34 -0600223
Adam Fordd76b69c2016-01-31 13:34:39 -0600224#ifdef CONFIG_USB_MUSB_OMAP2PLUS
225 musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
226#endif
227
Adam Ford5326c292016-01-29 20:12:34 -0600228 return 0;
229}
230
Peter Baradae5b77e62011-12-19 19:54:51 +0000231/*
232 * BOARD_ID_GPIO - GPIO of pin with optional pulldown resistor on SOM LV
233 */
234#define BOARD_ID_GPIO 189 /* hsusb0_data5 pin */
235
236/*
237 * Routine: board_init
238 * Description: Early hardware init.
239 */
240int board_init(void)
241{
Peter Baradae5b77e62011-12-19 19:54:51 +0000242 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
243
244 /* boot param addr */
245 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
246
Tom Rini3a23c422017-01-10 17:22:05 -0500247 return 0;
248}
249
250#ifdef CONFIG_BOARD_LATE_INIT
Adam Fordc1769042017-12-03 06:24:53 -0600251
252static void unlock_nand(void)
253{
254 int dev = nand_curr_device;
255 struct mtd_info *mtd;
256
257 mtd = get_nand_dev_by_index(dev);
258 nand_unlock(mtd, 0, mtd->size, 0);
259}
260
Tom Rini3a23c422017-01-10 17:22:05 -0500261int board_late_init(void)
262{
263 struct board_id *board;
264 unsigned int val;
265
Peter Baradae5b77e62011-12-19 19:54:51 +0000266 /*
267 * To identify between a SOM LV and Torpedo module,
268 * a pulldown resistor is on hsusb0_data5 for the SOM LV module.
269 * Drive the pin (and let it soak), then read it back.
270 * If the pin is still high its a Torpedo. If low its a SOM LV
271 */
272
273 /* Mux hsusb0_data5 as a GPIO */
274 MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M4));
275
276 if (gpio_request(BOARD_ID_GPIO, "husb0_data5.gpio_189") == 0) {
277
278 /*
279 * Drive BOARD_ID_GPIO - the pulldown resistor on the SOM LV
280 * will drain the voltage.
281 */
282 gpio_direction_output(BOARD_ID_GPIO, 0);
283 gpio_set_value(BOARD_ID_GPIO, 1);
284
285 /* Let it soak for a bit */
286 sdelay(0x100);
287
288 /*
289 * Read state of BOARD_ID_GPIO as an input and if its set.
290 * If so the board is a Torpedo
291 */
292 gpio_direction_input(BOARD_ID_GPIO);
293 val = gpio_get_value(BOARD_ID_GPIO);
294 gpio_free(BOARD_ID_GPIO);
295
296 board = &boards[!!(get_cpu_family() == CPU_OMAP36XX)][!!val];
297 printf("Board: %s\n", board->name);
298
299 /* Set the machine_id passed to Linux */
Tom Rini3a23c422017-01-10 17:22:05 -0500300 if (board->machine_id)
301 gd->bd->bi_arch_number = board->machine_id;
302
303 /* If the user has not set fdtimage, set the default */
Simon Glass64b723f2017-08-03 12:22:12 -0600304 if (!env_get("fdtimage"))
Simon Glass6a38e412017-08-03 12:22:09 -0600305 env_set("fdtimage", board->fdtfile);
Peter Baradae5b77e62011-12-19 19:54:51 +0000306 }
307
308 /* restore hsusb0_data5 pin as hsusb0_data5 */
309 MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0));
Adam Fordc1769042017-12-03 06:24:53 -0600310
311#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
312 unlock_nand();
313#endif
Adam Ford60da8c32016-02-17 21:49:49 -0600314 return 0;
315}
316#endif
317
Masahiro Yamada0a780172017-05-09 20:31:39 +0900318#if defined(CONFIG_MMC)
Peter Baradae5b77e62011-12-19 19:54:51 +0000319int board_mmc_init(bd_t *bis)
320{
Nikita Kiryanov4be9dbc2012-12-03 02:19:47 +0000321 return omap_mmc_init(0, 0, 0, -1, -1);
Peter Baradae5b77e62011-12-19 19:54:51 +0000322}
323#endif
324
Masahiro Yamada0a780172017-05-09 20:31:39 +0900325#if defined(CONFIG_MMC)
Paul Kocialkowski69559892014-11-08 20:55:47 +0100326void board_mmc_power_init(void)
327{
328 twl4030_power_mmc_init(0);
329}
330#endif
331
Peter Baradae5b77e62011-12-19 19:54:51 +0000332#ifdef CONFIG_SMC911X
333/* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
334static const u32 gpmc_lan92xx_config[] = {
335 NET_LAN92XX_GPMC_CONFIG1,
336 NET_LAN92XX_GPMC_CONFIG2,
337 NET_LAN92XX_GPMC_CONFIG3,
338 NET_LAN92XX_GPMC_CONFIG4,
339 NET_LAN92XX_GPMC_CONFIG5,
340 NET_LAN92XX_GPMC_CONFIG6,
341};
342
343int board_eth_init(bd_t *bis)
344{
345 enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1],
346 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
347
348 return smc911x_initialize(0, CONFIG_SMC911X_BASE);
349}
350#endif
351
Peter Baradae5b77e62011-12-19 19:54:51 +0000352