Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007-2008 |
| 4 | * Stelian Pop <stelian@popies.net> |
| 5 | * Lead Tech Design <www.leadtechdesign.com> |
| 6 | * |
| 7 | * (C) Copyright 2010 |
| 8 | * Achim Ehrlich <aehrlich@taskit.de> |
| 9 | * taskit GmbH <www.taskit.de> |
| 10 | * |
| 11 | * (C) Copyright 2012 |
| 12 | * Markus Hubig <mhubig@imko.de> |
| 13 | * IMKO GmbH <www.imko.de> |
| 14 | * |
| 15 | * (C) Copyright 2014 |
| 16 | * Heiko Schocher <hs@denx.de> |
| 17 | * DENX Software Engineering GmbH |
| 18 | * |
| 19 | * Configuation settings for the smartweb. |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 20 | */ |
| 21 | |
| 22 | #ifndef __CONFIG_H |
| 23 | #define __CONFIG_H |
| 24 | |
| 25 | /* |
| 26 | * SoC must be defined first, before hardware.h is included. |
| 27 | * In this case SoC is defined in boards.cfg. |
| 28 | */ |
| 29 | #include <asm/hardware.h> |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 30 | #include <linux/sizes.h> |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 31 | |
| 32 | /* |
| 33 | * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot |
| 34 | * program. Since the linker has to swallow that define, we must use a pure |
| 35 | * hex number here! |
| 36 | */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 37 | |
| 38 | /* ARM asynchronous clock */ |
| 39 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
| 40 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */ |
| 41 | |
| 42 | /* misc settings */ |
| 43 | #define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */ |
| 44 | #define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */ |
| 45 | #define CONFIG_INITRD_TAG /* pass initrd param to kernel */ |
Heiko Schocher | d1b8ea8 | 2016-05-25 07:23:47 +0200 | [diff] [blame] | 46 | #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* U-Boot is loaded by a bootloader */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 47 | |
Matthias Michel | 0ae5e92 | 2016-01-27 15:56:07 +0100 | [diff] [blame] | 48 | /* We set the max number of command args high to avoid HUSH bugs. */ |
| 49 | #define CONFIG_SYS_MAXARGS 32 |
| 50 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 51 | /* setting board specific options */ |
Tom Rini | 4815734 | 2017-01-25 20:42:35 -0500 | [diff] [blame] | 52 | #define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB |
Matthias Michel | 0ae5e92 | 2016-01-27 15:56:07 +0100 | [diff] [blame] | 53 | #define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */ |
Matthias Michel | 0ae5e92 | 2016-01-27 15:56:07 +0100 | [diff] [blame] | 54 | #define CONFIG_SYS_AUTOLOAD "yes" |
| 55 | #define CONFIG_RESET_TO_RETRY |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 56 | |
| 57 | /* The LED PINs */ |
| 58 | #define CONFIG_RED_LED AT91_PIN_PA9 |
| 59 | #define CONFIG_GREEN_LED AT91_PIN_PA6 |
| 60 | |
| 61 | /* |
| 62 | * SDRAM: 1 bank, 64 MB, base address 0x20000000 |
| 63 | * Already initialized before u-boot gets started. |
| 64 | */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 65 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 66 | #define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M) |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 67 | |
| 68 | /* |
| 69 | * Perform a SDRAM Memtest from the start of SDRAM |
| 70 | * till the beginning of the U-Boot position in RAM. |
| 71 | */ |
| 72 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 73 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) |
| 74 | |
| 75 | /* Size of malloc() pool */ |
| 76 | #define CONFIG_SYS_MALLOC_LEN \ |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 77 | ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000) |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 78 | |
| 79 | /* NAND flash settings */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 80 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 81 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
| 82 | #define CONFIG_SYS_NAND_DBW_8 |
| 83 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 84 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| 85 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
| 86 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 |
| 87 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 88 | /* general purpose I/O */ |
| 89 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ |
| 90 | #define CONFIG_AT91_GPIO /* enable the GPIO features */ |
| 91 | #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ |
| 92 | |
| 93 | /* serial console */ |
| 94 | #define CONFIG_ATMEL_USART |
| 95 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
| 96 | #define CONFIG_USART_ID ATMEL_ID_SYS |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 97 | |
| 98 | /* |
| 99 | * Ethernet configuration |
| 100 | * |
| 101 | */ |
| 102 | #define CONFIG_MACB |
| 103 | #define CONFIG_RMII /* use reduced MII inteface */ |
| 104 | #define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */ |
| 105 | #define CONFIG_AT91_WANTS_COMMON_PHY |
| 106 | |
| 107 | /* BOOTP and DHCP options */ |
| 108 | #define CONFIG_BOOTP_BOOTFILESIZE |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 109 | #define CONFIG_NFSBOOTCOMMAND \ |
| 110 | "setenv autoload yes; setenv autoboot yes; " \ |
| 111 | "setenv bootargs ${basicargs} ${mtdparts} " \ |
| 112 | "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \ |
| 113 | "dhcp" |
| 114 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 115 | #if !defined(CONFIG_SPL_BUILD) |
| 116 | /* USB configuration */ |
| 117 | #define CONFIG_USB_ATMEL |
| 118 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
| 119 | #define CONFIG_USB_OHCI_NEW |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 120 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
| 121 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE |
| 122 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" |
| 123 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 124 | |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 125 | /* USB DFU support */ |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 126 | |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 127 | #define CONFIG_USB_GADGET_AT91 |
| 128 | |
| 129 | /* DFU class support */ |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M |
| 131 | #define DFU_MANIFEST_POLL_TIMEOUT 25000 |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 132 | #endif |
| 133 | |
| 134 | /* General Boot Parameter */ |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 135 | #define CONFIG_BOOTCOMMAND "run flashboot" |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 136 | #define CONFIG_SYS_CBSIZE 512 |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 137 | |
| 138 | /* |
| 139 | * RAM Memory address where to put the |
| 140 | * Linux Kernel befor starting. |
| 141 | */ |
| 142 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 |
| 143 | |
| 144 | /* |
| 145 | * The NAND Flash partitions: |
| 146 | */ |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 147 | #define CONFIG_ENV_RANGE (SZ_512K) |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 148 | |
| 149 | /* |
| 150 | * Predefined environment variables. |
| 151 | * Usefull to define some easy to use boot commands. |
| 152 | */ |
| 153 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 154 | \ |
| 155 | "basicargs=console=ttyS0,115200\0" \ |
| 156 | \ |
Tom Rini | 5ad8e11 | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 157 | "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 158 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 159 | #ifdef CONFIG_SPL_BUILD |
| 160 | #define CONFIG_SYS_INIT_SP_ADDR 0x301000 |
| 161 | #define CONFIG_SPL_STACK_R |
| 162 | #define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE |
| 163 | #else |
| 164 | /* |
| 165 | * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, |
| 166 | * leaving the correct space for initial global data structure above that |
| 167 | * address while providing maximum stack area below. |
| 168 | */ |
| 169 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 170 | (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) |
| 171 | #endif |
| 172 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 173 | /* Defines for SPL */ |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 174 | #define CONFIG_SPL_MAX_SIZE (SZ_4K) |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 175 | |
| 176 | #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 177 | #define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K) |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 178 | #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ |
| 179 | CONFIG_SPL_BSS_MAX_SIZE) |
| 180 | #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 181 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 182 | #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 183 | #define CONFIG_SYS_USE_NANDFLASH 1 |
| 184 | #define CONFIG_SPL_NAND_DRIVERS |
| 185 | #define CONFIG_SPL_NAND_BASE |
| 186 | #define CONFIG_SPL_NAND_ECC |
| 187 | #define CONFIG_SPL_NAND_RAW_ONLY |
| 188 | #define CONFIG_SPL_NAND_SOFTECC |
| 189 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 190 | #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 191 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
| 192 | #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE |
| 193 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 194 | |
Heiko Schocher | cf5137c | 2015-09-08 11:52:52 +0200 | [diff] [blame] | 195 | #define CONFIG_SYS_NAND_SIZE (SZ_256M) |
| 196 | #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K |
| 197 | #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 198 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ |
| 199 | CONFIG_SYS_NAND_PAGE_SIZE) |
| 200 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS |
| 201 | #define CONFIG_SYS_NAND_ECCSIZE 256 |
| 202 | #define CONFIG_SYS_NAND_ECCBYTES 3 |
| 203 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
| 204 | #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ |
| 205 | 48, 49, 50, 51, 52, 53, 54, 55, \ |
| 206 | 56, 57, 58, 59, 60, 61, 62, 63, } |
| 207 | |
| 208 | #define CONFIG_SPL_ATMEL_SIZE |
| 209 | #define CONFIG_SYS_MASTER_CLOCK (198656000/2) |
| 210 | #define AT91_PLL_LOCK_TIMEOUT 1000000 |
| 211 | #define CONFIG_SYS_AT91_PLLA 0x2060bf09 |
| 212 | #define CONFIG_SYS_MCKR 0x100 |
| 213 | #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) |
| 214 | #define CONFIG_SYS_AT91_PLLB 0x10483f0e |
| 215 | |
Stefan Roese | 67bcbef | 2019-04-02 10:57:25 +0200 | [diff] [blame] | 216 | #define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS |
| 217 | #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO |
| 218 | |
Heiko Schocher | 44a9344 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 219 | #endif /* __CONFIG_H */ |