blob: 279c55c99dbd4ebcbc8bab93881b98a02474584c [file] [log] [blame]
Mike Frysinger4752c192008-10-12 21:32:52 -04001/*
2 * U-boot - main board file
3 *
4 * Copyright (c) 2008-2009 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <common.h>
10#include <config.h>
11#include <command.h>
12#include <net.h>
13#include <netdev.h>
14#include <spi.h>
15#include <asm/blackfin.h>
16#include <asm/net.h>
17#include <asm/mach-common/bits/otp.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
21int checkboard(void)
22{
23 printf("Board: ADI BF518F EZ-Board board\n");
24 printf(" Support: http://blackfin.uclinux.org/\n");
25 return 0;
26}
27
Mike Frysinger4752c192008-10-12 21:32:52 -040028#if defined(CONFIG_BFIN_MAC)
29static void board_init_enetaddr(uchar *mac_addr)
30{
31 bool valid_mac = false;
32
33#if 0
34 /* the MAC is stored in OTP memory page 0xDF */
35 uint32_t ret;
36 uint64_t otp_mac;
37
38 ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac);
39 if (!(ret & OTP_MASTER_ERROR)) {
40 uchar *otp_mac_p = (uchar *)&otp_mac;
41
42 for (ret = 0; ret < 6; ++ret)
43 mac_addr[ret] = otp_mac_p[5 - ret];
44
45 if (is_valid_ether_addr(mac_addr))
46 valid_mac = true;
47 }
48#endif
49
50 if (!valid_mac) {
51 puts("Warning: Generating 'random' MAC address\n");
52 bfin_gen_rand_mac(mac_addr);
53 }
54
55 eth_setenv_enetaddr("ethaddr", mac_addr);
56}
57
Graf Yanga211d4b2009-05-05 02:26:27 -040058#define KSZ_MAX_HZ 5000000
59
60#define KSZ_WRITE 0x02
61#define KSZ_READ 0x03
62
63#define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */
64#define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */
65#define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */
66
67static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
Wolfgang Denkcc474d82009-05-15 22:32:57 +020068 uchar data, uchar result[3])
Graf Yanga211d4b2009-05-05 02:26:27 -040069{
70 unsigned char dout[3] = { dir, reg, data, };
71 return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
72}
73
74static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
75{
76 unsigned char din[3];
77 return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
78}
79
80static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
81{
82 int ret = 0;
83 unsigned char din[3];
84
85 ret |= ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
86 ret |= ksz8893m_reg_set(slave, reg, din[2] & mask);
87
88 return ret;
89}
90
91static int ksz8893m_reset(struct spi_slave *slave)
92{
93 int ret = 0;
94
95 /* Disable STPID mode */
96 ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
97
98 /* Disable VLAN tag insert on Port3 */
99 ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
100
101 /* Start switch */
102 ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
103
104 return ret;
105}
106
Mike Frysinger4752c192008-10-12 21:32:52 -0400107int board_eth_init(bd_t *bis)
108{
109 static bool switch_is_alive = false;
110 int ret;
111
112 if (!switch_is_alive) {
Graf Yanga211d4b2009-05-05 02:26:27 -0400113 struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
Mike Frysinger4752c192008-10-12 21:32:52 -0400114 if (slave) {
115 if (!spi_claim_bus(slave)) {
Graf Yanga211d4b2009-05-05 02:26:27 -0400116 ret = ksz8893m_reset(slave);
Mike Frysinger4752c192008-10-12 21:32:52 -0400117 if (!ret)
118 switch_is_alive = true;
119 spi_release_bus(slave);
120 }
121 spi_free_slave(slave);
122 }
123 }
124
125 if (switch_is_alive)
126 return bfin_EMAC_initialize(bis);
127 else
128 return -1;
129}
130#endif
131
132int misc_init_r(void)
133{
134#ifdef CONFIG_BFIN_MAC
135 uchar enetaddr[6];
136 if (!eth_getenv_enetaddr("ethaddr", enetaddr))
137 board_init_enetaddr(enetaddr);
138#endif
139
140 return 0;
141}
Graf Yang55e4b492009-05-24 02:34:34 -0400142
143int board_early_init_f(void)
144{
145#if !defined(CONFIG_SYS_NO_FLASH)
146 /* setup BF518-EZBRD GPIO pin PG11 to AMS2. */
147 bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2);
148 bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG11);
149
150# if !defined(CONFIG_BFIN_SPI)
151 /* setup BF518-EZBRD GPIO pin PG15 to AMS3. */
152 bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_3);
153 bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG15);
154# endif
155#endif
156 return 0;
157}