Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / a6e2923ad13c12c46a2e26d769b318c572711300 / . / configs / Linksprite_pcDuino3_Nano_defconfig
blob: 25cea8437394bf646eef103a71117880b9d95dd1 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_SUNXI=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]3CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano"
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]4CONFIG_SPL=y
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]5CONFIG_MACH_SUN7I=y
6CONFIG_DRAM_CLK=408
7CONFIG_DRAM_ZQ=122
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]8CONFIG_USB1_VBUS_PIN="PH11"
Mylène Josserand628426a2017-04-02 12:59:09 +0200[diff] [blame]9CONFIG_SATAPWR="PH2"
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]10CONFIG_GMAC_TX_DELAY=3
Jelle van der Waa56a56c32016-10-31 21:05:09 +0100[diff] [blame]11CONFIG_AHCI=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +0900[diff] [blame]12# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]13CONFIG_SPL_I2C=y
Tuomas Tynkkynenedf9f622017-12-08 15:36:19 +0200[diff] [blame]14CONFIG_SCSI_AHCI=y
Tom Rini8825ec42021-08-17 17:59:47 -0400[diff] [blame]15CONFIG_SYS_I2C_MVTWSI=y
Tom Rinia6e29232021-08-18 23:12:32 -0400[diff] [blame^]16CONFIG_SYS_I2C_SLAVE=0x7f
17CONFIG_SYS_I2C_SPEED=400000
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]18CONFIG_PHY_REALTEK=y
Simon Glass6e378742015-04-05 16:07:34 -0600[diff] [blame]19CONFIG_ETH_DESIGNWARE=y
Mylène Josserande44eb3a2017-04-02 12:59:08 +0200[diff] [blame]20CONFIG_RGMII=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]21CONFIG_MII=y
Mylène Josserandc1506ef2017-04-02 12:59:03 +0200[diff] [blame]22CONFIG_SUN7I_GMAC=y
Tom Rinie791a022017-08-11 11:20:19 -0400[diff] [blame]23CONFIG_SCSI=y
Tom Rini10e87172015-06-30 16:51:15 -0400[diff] [blame]24CONFIG_USB_EHCI_HCD=y
Tom Rini7fc96ef2019-02-07 14:53:03 -0500[diff] [blame]25CONFIG_USB_OHCI_HCD=y