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wdenk544e9732004-02-06 23:19:44 +00001 XES XPedite1000 Board
2
3 Last Update: December 29, 2003
4=======================================================================
5
6This file contains some handy info regarding U-Boot and the XES
7XPedite1000 PPC440GX PrPMC board. See the README.ppc440 for additional
8information.
9
10
11SWITCH SETTINGS & JUMPERS
12==========================
13
14Jumpers selected for AMD29LV040B flash part as the boot flash.
15
16
17I2C Strap EEPROM & Environment Settings
18=======================================
19
20The XPedite1000 uses a single I2C eeprom for the 440 strappings and for
21the environment variables. The first page (256 bytes) contains the
22strappings and the 2 EMAC HW Ethernet addresses. Be careful not to
23change the 1st page of the EEPROM! Unpopulated jumper J560 can get you
24out of trouble as it disables the strapping read from EEPROM.
25
26I2C iprobe
27=====================
28
29The i2c utilities work and have been tested on Rev B. of the 440GX. See
30README.ebony for more information about i2c probing with the 440.
31
32
33GETTING OUT OF I2C TROUBLE
34===========================
35
36(Direct quote from README.ebony)
37If you're like me ... you may have screwed up your bootstrap serial
38eeprom ... or worse, your SPD eeprom when experimenting with the
39i2c commands. If so, here are some ideas on how to get out of
40trouble:
41
42Serial bootstrap eeprom corruption:
43-----------------------------------
44Power down the board and set the following straps:
45
46J560 - closed
47
48This will select the default sys0 and sys1 settings (the serial
49eeproms are not used). Then power up the board and fix the serial
50eeprom using the imm command. Here are the values I currently
51use:
52
53=> imd 50 0 10
54
550000: 85 7d 42 06 07 80 11 00 00 00 00 00 00 00 00 00 .}B.............
56
57Once you have the eeproms set correctly change the
58J560 straps as you desire.
59
60
61PPC440GX Ethernet EMACs
62=======================
63
64The XES XPedite1000 uses emac 2 & 3 and ignores emac 0 & 1. PHYs are connected
65only to emac 2 & 3. The HW Ethernet addresses are read from the i2c eeprom and
66placed in the bd info structure for enet2addr and enet3addr. The ethernet driver
67senses that enetaddr and enet1addr are 0's and does not use them.
68
69As of this writing gigabit ethernet and the TCPIP acceleration hardware is not
70supported.
71
72
73Flash Support
74=============
75
76As of this writing, there is support for the 1/2mb boot flash only. User flash
77is not yet supported.
78
79
80Regards,
81--Travis
82<travis.sawyer@sandburst.com>