Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 1 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 2 | CONFIG_DEFAULT_DEVICE_TREE="sandbox" |
| 3 | CONFIG_DISTRO_DEFAULTS=y |
Tom Rini | b5bf562 | 2017-08-25 17:50:27 -0400 | [diff] [blame] | 4 | CONFIG_ANDROID_BOOT_IMAGE=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 5 | CONFIG_FIT=y |
| 6 | CONFIG_FIT_SIGNATURE=y |
| 7 | CONFIG_FIT_VERBOSE=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 8 | CONFIG_BOOTSTAGE=y |
| 9 | CONFIG_BOOTSTAGE_REPORT=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 10 | CONFIG_BOOTSTAGE_FDT=y |
| 11 | CONFIG_BOOTSTAGE_STASH=y |
| 12 | CONFIG_BOOTSTAGE_STASH_ADDR=0x0 |
| 13 | CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 |
| 14 | CONFIG_CONSOLE_RECORD=y |
| 15 | CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 |
| 16 | CONFIG_SILENT_CONSOLE=y |
| 17 | CONFIG_CMD_CPU=y |
| 18 | CONFIG_CMD_LICENSE=y |
| 19 | CONFIG_CMD_BOOTZ=y |
| 20 | # CONFIG_CMD_ELF is not set |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 21 | CONFIG_CMD_ASKENV=y |
| 22 | CONFIG_CMD_GREPENV=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 23 | CONFIG_LOOPW=y |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 24 | CONFIG_CMD_MD5SUM=y |
| 25 | CONFIG_CMD_MEMINFO=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 26 | CONFIG_CMD_MEMTEST=y |
| 27 | CONFIG_CMD_MX_CYCLIC=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 28 | CONFIG_CMD_DEMO=y |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 29 | CONFIG_CMD_GPIO=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 30 | CONFIG_CMD_GPT=y |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 31 | CONFIG_CMD_I2C=y |
| 32 | CONFIG_CMD_PCI=y |
| 33 | CONFIG_CMD_REMOTEPROC=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 34 | CONFIG_CMD_SF=y |
| 35 | CONFIG_CMD_SPI=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 36 | CONFIG_CMD_USB=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 37 | CONFIG_CMD_TFTPPUT=y |
| 38 | CONFIG_CMD_TFTPSRV=y |
| 39 | CONFIG_CMD_RARP=y |
| 40 | CONFIG_CMD_CDP=y |
| 41 | CONFIG_CMD_SNTP=y |
| 42 | CONFIG_CMD_DNS=y |
| 43 | CONFIG_CMD_LINK_LOCAL=y |
| 44 | CONFIG_CMD_TIME=y |
| 45 | CONFIG_CMD_TIMER=y |
| 46 | CONFIG_CMD_SOUND=y |
| 47 | CONFIG_CMD_QFW=y |
| 48 | CONFIG_CMD_BOOTSTAGE=y |
| 49 | CONFIG_CMD_PMIC=y |
| 50 | CONFIG_CMD_REGULATOR=y |
| 51 | CONFIG_CMD_TPM=y |
| 52 | CONFIG_CMD_TPM_TEST=y |
| 53 | CONFIG_CMD_EXT4_WRITE=y |
| 54 | CONFIG_MAC_PARTITION=y |
| 55 | CONFIG_AMIGA_PARTITION=y |
| 56 | CONFIG_OF_CONTROL=y |
| 57 | CONFIG_OF_HOSTFILE=y |
| 58 | CONFIG_NETCONSOLE=y |
| 59 | CONFIG_REGMAP=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 60 | CONFIG_SYSCON=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 61 | CONFIG_DEVRES=y |
| 62 | CONFIG_DEBUG_DEVRES=y |
| 63 | CONFIG_ADC=y |
| 64 | CONFIG_ADC_SANDBOX=y |
| 65 | CONFIG_CLK=y |
| 66 | CONFIG_CPU=y |
| 67 | CONFIG_DM_DEMO=y |
| 68 | CONFIG_DM_DEMO_SIMPLE=y |
| 69 | CONFIG_DM_DEMO_SHAPE=y |
| 70 | CONFIG_PM8916_GPIO=y |
| 71 | CONFIG_SANDBOX_GPIO=y |
| 72 | CONFIG_DM_I2C_COMPAT=y |
| 73 | CONFIG_I2C_CROS_EC_TUNNEL=y |
| 74 | CONFIG_I2C_CROS_EC_LDO=y |
| 75 | CONFIG_DM_I2C_GPIO=y |
| 76 | CONFIG_SYS_I2C_SANDBOX=y |
| 77 | CONFIG_I2C_MUX=y |
| 78 | CONFIG_SPL_I2C_MUX=y |
| 79 | CONFIG_I2C_ARB_GPIO_CHALLENGE=y |
| 80 | CONFIG_CROS_EC_KEYB=y |
| 81 | CONFIG_I8042_KEYB=y |
| 82 | CONFIG_LED=y |
| 83 | CONFIG_LED_BLINK=y |
| 84 | CONFIG_LED_GPIO=y |
| 85 | CONFIG_DM_MAILBOX=y |
| 86 | CONFIG_SANDBOX_MBOX=y |
| 87 | CONFIG_MISC=y |
| 88 | CONFIG_CROS_EC=y |
| 89 | CONFIG_CROS_EC_I2C=y |
| 90 | CONFIG_CROS_EC_LPC=y |
| 91 | CONFIG_CROS_EC_SANDBOX=y |
| 92 | CONFIG_CROS_EC_SPI=y |
| 93 | CONFIG_PWRSEQ=y |
| 94 | CONFIG_SPL_PWRSEQ=y |
| 95 | CONFIG_I2C_EEPROM=y |
| 96 | CONFIG_MMC_SANDBOX=y |
| 97 | CONFIG_SPI_FLASH_SANDBOX=y |
| 98 | CONFIG_SPI_FLASH=y |
| 99 | CONFIG_SPI_FLASH_ATMEL=y |
| 100 | CONFIG_SPI_FLASH_EON=y |
| 101 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| 102 | CONFIG_SPI_FLASH_MACRONIX=y |
| 103 | CONFIG_SPI_FLASH_SPANSION=y |
| 104 | CONFIG_SPI_FLASH_STMICRO=y |
| 105 | CONFIG_SPI_FLASH_SST=y |
| 106 | CONFIG_SPI_FLASH_WINBOND=y |
| 107 | CONFIG_DM_ETH=y |
Bin Meng | 6123f638 | 2017-08-22 08:15:19 -0700 | [diff] [blame] | 108 | CONFIG_NVME=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 109 | CONFIG_PCI=y |
| 110 | CONFIG_DM_PCI=y |
| 111 | CONFIG_DM_PCI_COMPAT=y |
| 112 | CONFIG_PCI_SANDBOX=y |
Tom Rini | 256aa74 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 113 | CONFIG_PHY=y |
| 114 | CONFIG_PHY_SANDBOX=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 115 | CONFIG_PINCTRL=y |
| 116 | CONFIG_PINCONF=y |
| 117 | CONFIG_PINCTRL_ROCKCHIP_RK3036=y |
| 118 | CONFIG_PINCTRL_ROCKCHIP_RK3288=y |
| 119 | CONFIG_PINCTRL_SANDBOX=y |
| 120 | CONFIG_POWER_DOMAIN=y |
| 121 | CONFIG_SANDBOX_POWER_DOMAIN=y |
| 122 | CONFIG_DM_PMIC=y |
| 123 | CONFIG_PMIC_ACT8846=y |
| 124 | CONFIG_DM_PMIC_PFUZE100=y |
| 125 | CONFIG_DM_PMIC_MAX77686=y |
| 126 | CONFIG_PMIC_PM8916=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 127 | CONFIG_PMIC_S2MPS11=y |
| 128 | CONFIG_DM_PMIC_SANDBOX=y |
| 129 | CONFIG_PMIC_S5M8767=y |
| 130 | CONFIG_PMIC_TPS65090=y |
| 131 | CONFIG_DM_REGULATOR=y |
| 132 | CONFIG_REGULATOR_ACT8846=y |
| 133 | CONFIG_DM_REGULATOR_PFUZE100=y |
| 134 | CONFIG_DM_REGULATOR_MAX77686=y |
| 135 | CONFIG_DM_REGULATOR_FIXED=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 136 | CONFIG_REGULATOR_S5M8767=y |
| 137 | CONFIG_DM_REGULATOR_SANDBOX=y |
| 138 | CONFIG_REGULATOR_TPS65090=y |
Tom Rini | 256aa74 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 139 | CONFIG_DM_PWM=y |
| 140 | CONFIG_PWM_SANDBOX=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 141 | CONFIG_RAM=y |
| 142 | CONFIG_REMOTEPROC_SANDBOX=y |
| 143 | CONFIG_DM_RESET=y |
| 144 | CONFIG_SANDBOX_RESET=y |
| 145 | CONFIG_DM_RTC=y |
| 146 | CONFIG_SANDBOX_SERIAL=y |
| 147 | CONFIG_SOUND=y |
| 148 | CONFIG_SOUND_SANDBOX=y |
| 149 | CONFIG_SANDBOX_SPI=y |
| 150 | CONFIG_SPMI=y |
| 151 | CONFIG_SPMI_SANDBOX=y |
| 152 | CONFIG_SYSRESET=y |
| 153 | CONFIG_TIMER=y |
| 154 | CONFIG_TIMER_EARLY=y |
| 155 | CONFIG_SANDBOX_TIMER=y |
| 156 | CONFIG_TPM_TIS_SANDBOX=y |
| 157 | CONFIG_USB=y |
| 158 | CONFIG_DM_USB=y |
| 159 | CONFIG_USB_EMUL=y |
| 160 | CONFIG_USB_STORAGE=y |
| 161 | CONFIG_USB_KEYBOARD=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 162 | CONFIG_DM_VIDEO=y |
| 163 | CONFIG_CONSOLE_ROTATION=y |
| 164 | CONFIG_CONSOLE_TRUETYPE=y |
| 165 | CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y |
| 166 | CONFIG_VIDEO_SANDBOX_SDL=y |
Simon Glass | d27aba5 | 2017-05-18 20:09:24 -0600 | [diff] [blame] | 167 | CONFIG_CMD_DHRYSTONE=y |
| 168 | CONFIG_TPM=y |
| 169 | CONFIG_LZ4=y |
| 170 | CONFIG_ERRNO_STR=y |
| 171 | CONFIG_UNIT_TEST=y |
| 172 | CONFIG_UT_TIME=y |
| 173 | CONFIG_UT_DM=y |
| 174 | CONFIG_UT_ENV=y |