Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 1 | /* |
Kyungmin Park | d1362a6 | 2008-03-31 10:40:54 +0900 | [diff] [blame] | 2 | * (C) Copyright 2005-2008 |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 3 | * Samsung Electronics, |
| 4 | * Kyungmin Park <kyungmin.park@samsung.com> |
| 5 | * |
| 6 | * Configuration settings for the 2420 Samsung Apollon board. |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #ifndef __CONFIG_H |
| 28 | #define __CONFIG_H |
| 29 | |
| 30 | /* |
| 31 | * High Level Configuration Options |
| 32 | */ |
| 33 | #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ |
| 34 | #define CONFIG_OMAP 1 /* in a TI OMAP core */ |
| 35 | #define CONFIG_OMAP2420 1 /* which is in a 2420 */ |
| 36 | #define CONFIG_OMAP2420_APOLLON 1 |
| 37 | #define CONFIG_APOLLON 1 |
| 38 | #define CONFIG_APOLLON_PLUS 1 /* If you have apollon plus 1.x */ |
| 39 | |
| 40 | /* Clock config to target*/ |
| 41 | #define PRCM_CONFIG_I 1 |
Wolfgang Denk | c93939f | 2008-01-09 11:36:21 +0100 | [diff] [blame] | 42 | /* #define PRCM_CONFIG_II 1 */ |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 43 | |
| 44 | /* Boot method */ |
| 45 | /* uncomment if you use NOR boot */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 46 | /* #define CONFIG_SYS_NOR_BOOT 1 */ |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 47 | |
| 48 | /* uncomment if you use NOR on CS3 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 49 | /* #define CONFIG_SYS_USE_NOR 1 */ |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 50 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 51 | #ifdef CONFIG_SYS_NOR_BOOT |
| 52 | #undef CONFIG_SYS_USE_NOR |
| 53 | #define CONFIG_SYS_USE_NOR 1 |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 54 | #endif |
| 55 | |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 56 | /* uncommnet if you want to use UBI */ |
| 57 | #define CONFIG_SYS_USE_UBI |
| 58 | |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 59 | #include <asm/arch/omap2420.h> /* get chip and board defs */ |
| 60 | |
| 61 | #define V_SCLK 12000000 |
| 62 | |
| 63 | /* input clock of PLL */ |
| 64 | /* the OMAP2420 H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */ |
| 65 | #define CONFIG_SYS_CLK_FREQ V_SCLK |
| 66 | |
| 67 | #undef CONFIG_USE_IRQ /* no support for IRQs */ |
| 68 | #define CONFIG_MISC_INIT_R |
| 69 | |
| 70 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 71 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 72 | #define CONFIG_INITRD_TAG 1 |
| 73 | #define CONFIG_REVISION_TAG 1 |
| 74 | |
| 75 | /* |
| 76 | * Size of malloc() pool |
| 77 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 78 | #define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */ |
Amul Kumar Saha | 4773566 | 2009-11-04 10:38:46 +0530 | [diff] [blame] | 79 | #define CONFIG_ENV_SIZE_FLEX SZ_256K |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 80 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M) |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 81 | |
| 82 | /* |
| 83 | * Hardware drivers |
| 84 | */ |
| 85 | |
| 86 | /* |
| 87 | * SMC91c96 Etherent |
| 88 | */ |
Nishanth Menon | ee1c20f | 2009-10-16 00:06:37 -0500 | [diff] [blame] | 89 | #define CONFIG_LAN91C96 |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 90 | #define CONFIG_LAN91C96_BASE (APOLLON_CS1_BASE+0x300) |
| 91 | #define CONFIG_LAN91C96_EXT_PHY |
| 92 | |
| 93 | /* |
| 94 | * NS16550 Configuration |
| 95 | */ |
| 96 | #define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */ |
| 97 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 98 | #define CONFIG_SYS_NS16550 |
| 99 | #define CONFIG_SYS_NS16550_SERIAL |
| 100 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 101 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK /* 3MHz (1.5MHz*2) */ |
| 102 | #define CONFIG_SYS_NS16550_COM1 OMAP2420_UART1 |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 103 | |
| 104 | /* |
| 105 | * select serial console configuration |
| 106 | */ |
| 107 | #define CONFIG_SERIAL1 1 /* UART1 on H4 */ |
| 108 | |
Wolfgang Denk | c93939f | 2008-01-09 11:36:21 +0100 | [diff] [blame] | 109 | /* allow to overwrite serial and ethaddr */ |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 110 | #define CONFIG_ENV_OVERWRITE |
| 111 | #define CONFIG_CONS_INDEX 1 |
| 112 | #define CONFIG_BAUDRATE 115200 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 113 | #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 114 | |
Wolfgang Denk | c93939f | 2008-01-09 11:36:21 +0100 | [diff] [blame] | 115 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 116 | #include <config_cmd_default.h> |
| 117 | |
| 118 | #define CONFIG_CMD_DHCP |
| 119 | #define CONFIG_CMD_DIAG |
| 120 | #define CONFIG_CMD_ONENAND |
| 121 | |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 122 | #ifdef CONFIG_SYS_USE_UBI |
| 123 | #define CONFIG_CMD_JFFS2 |
| 124 | #define CONFIG_CMD_UBI |
| 125 | #define CONFIG_RBTREE |
Stefan Roese | 5dc958f | 2009-05-12 14:32:58 +0200 | [diff] [blame] | 126 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 127 | #define CONFIG_MTD_PARTITIONS |
| 128 | #endif |
| 129 | |
Wolfgang Denk | 85c25df | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 130 | #undef CONFIG_CMD_SOURCE |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 131 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 132 | #ifndef CONFIG_SYS_USE_NOR |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 133 | # undef CONFIG_CMD_FLASH |
| 134 | # undef CONFIG_CMD_IMLS |
| 135 | #endif |
| 136 | |
| 137 | #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT |
| 138 | |
| 139 | #define CONFIG_BOOTDELAY 1 |
| 140 | |
| 141 | #define CONFIG_NETMASK 255.255.255.0 |
| 142 | #define CONFIG_IPADDR 192.168.116.25 |
| 143 | #define CONFIG_SERVERIP 192.168.116.1 |
| 144 | #define CONFIG_BOOTFILE "uImage" |
| 145 | #define CONFIG_ETHADDR 00:0E:99:00:24:20 |
| 146 | |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 147 | #ifdef CONFIG_APOLLON_PLUS |
| 148 | #define CONFIG_SYS_MEM "mem=64M" |
| 149 | #else |
| 150 | #define CONFIG_SYS_MEM "mem=128" |
| 151 | #endif |
| 152 | |
| 153 | #ifdef CONFIG_SYS_USE_UBI |
| 154 | #define CONFIG_SYS_UBI "ubi.mtd=4" |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 155 | #else |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 156 | #define CONFIG_SYS_UBI "" |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 157 | #endif |
| 158 | |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 159 | #define CONFIG_BOOTARGS "root=/dev/nfs rw " CONFIG_SYS_MEM \ |
| 160 | " console=ttyS0,115200n8" \ |
| 161 | " ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:" \ |
| 162 | "apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2 " \ |
| 163 | CONFIG_SYS_UBI |
| 164 | |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 165 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Peter Pearse | f402614 | 2007-11-15 08:58:00 +0000 | [diff] [blame] | 166 | "Image=tftp 0x80008000 Image; go 0x80008000\0" \ |
| 167 | "zImage=tftp 0x80180000 zImage; go 0x80180000\0" \ |
| 168 | "uImage=tftp 0x80180000 uImage; bootm 0x80180000\0" \ |
| 169 | "uboot=tftp 0x80008000 u-boot.bin; go 0x80008000\0" \ |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 170 | "xloader=tftp 0x80180000 x-load.bin; " \ |
| 171 | " cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \ |
Peter Pearse | f402614 | 2007-11-15 08:58:00 +0000 | [diff] [blame] | 172 | "syncmode50=mw.w 0x1e442 0xc0c4; mw 0x6800a060 0xe30d1201\0" \ |
| 173 | "syncmode=mw.w 0x1e442 0xe0f4; mw 0x6800a060 0xe30d1201\0" \ |
| 174 | "norboot=cp32 0x18040000 0x80008000 0x200000; go 0x80008000\0" \ |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 175 | "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0" \ |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 176 | "onesyncboot=run syncmode oneboot\0" \ |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 177 | "updateb=tftp 0x80180000 u-boot-onenand.bin; " \ |
| 178 | " onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \ |
| 179 | "ubi=setenv bootargs ${bootargs} ubi.mtd=4 ${mtdparts}; run uImage\0" \ |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 180 | "bootcmd=run uboot\0" |
| 181 | |
| 182 | /* |
| 183 | * Miscellaneous configurable options |
| 184 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 185 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Robert P. J. Day | 23f5a2d | 2009-12-12 12:10:33 -0500 | [diff] [blame] | 186 | #define CONFIG_SYS_PROMPT "Apollon # " |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 187 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 188 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 189 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
| 190 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 191 | /* Boot Argument Buffer Size */ |
| 192 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 193 | /* memtest works on */ |
| 194 | #define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 195 | #define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M) |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 196 | |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 197 | /* default load address */ |
| 198 | #define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 199 | |
Wolfgang Denk | c93939f | 2008-01-09 11:36:21 +0100 | [diff] [blame] | 200 | /* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) |
| 201 | * or by 32KHz clk, or from external sig. This rate is divided by a local |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 202 | * divisor. |
| 203 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 204 | #define CONFIG_SYS_TIMERBASE OMAP2420_GPT2 |
Ladislav Michl | 993e57d | 2009-03-30 18:58:41 +0200 | [diff] [blame] | 205 | #define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ |
| 206 | #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 207 | |
| 208 | /*----------------------------------------------------------------------- |
| 209 | * Stack sizes |
| 210 | * |
Wolfgang Denk | c93939f | 2008-01-09 11:36:21 +0100 | [diff] [blame] | 211 | * The stack sizes are set up in start.S using the settings below |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 212 | */ |
| 213 | #define CONFIG_STACKSIZE SZ_128K /* regular stack */ |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 214 | |
| 215 | /*----------------------------------------------------------------------- |
| 216 | * Physical Memory Map |
| 217 | */ |
| 218 | #define CONFIG_NR_DRAM_BANKS 1 /* CS1 may or may not be populated */ |
| 219 | #define PHYS_SDRAM_1 OMAP2420_SDRC_CS0 |
| 220 | #define PHYS_SDRAM_1_SIZE SZ_128M |
| 221 | #define PHYS_SDRAM_2 OMAP2420_SDRC_CS1 |
| 222 | |
| 223 | /*----------------------------------------------------------------------- |
| 224 | * FLASH and environment organization |
| 225 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 226 | #ifdef CONFIG_SYS_USE_NOR |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 227 | /* OneNAND boot, NOR has CS3, But NOR has CS0 when NOR boot */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 228 | # define CONFIG_SYS_FLASH_BASE 0x18000000 |
| 229 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 230 | # define CONFIG_SYS_MAX_FLASH_SECT 1024 |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 231 | /*----------------------------------------------------------------------- |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 232 | * CFI FLASH driver setup |
| 233 | */ |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 234 | /* Flash memory is CFI compliant */ |
| 235 | # define CONFIG_SYS_FLASH_CFI 1 |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 236 | # define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 237 | /* Use buffered writes (~10x faster) */ |
| 238 | /* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ |
| 239 | /* Use h/w sector protection*/ |
| 240 | # define CONFIG_SYS_FLASH_PROTECTION 1 |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 241 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 242 | #else /* !CONFIG_SYS_USE_NOR */ |
| 243 | # define CONFIG_SYS_NO_FLASH 1 |
| 244 | #endif /* CONFIG_SYS_USE_NOR */ |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 245 | |
| 246 | /* OneNAND boot, OneNAND has CS0, NOR boot ONeNAND has CS2 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 247 | #define CONFIG_SYS_ONENAND_BASE 0x00000000 |
Rohit Hagargundgi | 993992b | 2009-03-09 19:45:46 +0530 | [diff] [blame] | 248 | #define CONFIG_SYS_MONITOR_LEN SZ_256K /* U-Boot image size */ |
Jean-Christophe PLAGNIOL-VILLARD | 7598916 | 2008-09-10 22:47:59 +0200 | [diff] [blame] | 249 | #define CONFIG_ENV_IS_IN_ONENAND 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 250 | #define CONFIG_ENV_ADDR 0x00020000 |
Amul Kumar Saha | 4773566 | 2009-11-04 10:38:46 +0530 | [diff] [blame] | 251 | #define CONFIG_ENV_ADDR_FLEX 0x00040000 |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 252 | |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 253 | #ifdef CONFIG_SYS_USE_UBI |
Stefan Roese | b1423dd | 2009-03-19 13:30:36 +0100 | [diff] [blame] | 254 | #define CONFIG_CMD_MTDPARTS |
Kyungmin Park | 861aff1 | 2008-10-24 14:55:33 +0200 | [diff] [blame] | 255 | #define MTDIDS_DEFAULT "onenand0=onenand" |
| 256 | #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(bootloader)," \ |
| 257 | "128k(params)," \ |
| 258 | "2m(kernel)," \ |
| 259 | "16m(rootfs)," \ |
| 260 | "32m(fs)," \ |
| 261 | "-(ubifs)" |
| 262 | #endif |
| 263 | |
Igor Grinberg | fa63aa7 | 2011-06-24 09:34:38 +0000 | [diff] [blame] | 264 | #define PHYS_SRAM 0x4020F800 |
| 265 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 266 | #define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM |
| 267 | |
Peter Pearse | ba348b5 | 2007-11-09 15:24:26 +0000 | [diff] [blame] | 268 | #endif /* __CONFIG_H */ |