| Trevor Woerner | 2bcc1ed | 2020-05-06 08:02:42 -0400 | [diff] [blame] | 1 | if ARCH_STM32 |
| Vikas Manocha | 95c8919 | 2016-01-15 17:49:06 -0800 | [diff] [blame] | 2 | |
| 3 | config STM32F4 |
| 4 | bool "stm32f4 family" |
| Patrice Chotard | 1226eaf | 2018-01-12 09:23:50 +0100 | [diff] [blame] | 5 | select CLK |
| 6 | select DM_GPIO |
| 7 | select DM_RESET |
| 8 | select MISC |
| 9 | select PINCTRL |
| 10 | select PINCTRL_STM32 |
| 11 | select RAM |
| Patrice Chotard | 1226eaf | 2018-01-12 09:23:50 +0100 | [diff] [blame] | 12 | select STM32_RCC |
| 13 | select STM32_RESET |
| Michal Simek | 7e7ba3b | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 14 | select STM32_SDRAM |
| Patrice Chotard | 1226eaf | 2018-01-12 09:23:50 +0100 | [diff] [blame] | 15 | select STM32_SERIAL |
| Patrice Chotard | 0c15676 | 2018-02-07 10:44:50 +0100 | [diff] [blame] | 16 | select STM32_TIMER |
| 17 | select TIMER |
| Vikas Manocha | 95c8919 | 2016-01-15 17:49:06 -0800 | [diff] [blame] | 18 | |
| Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 19 | config STM32F7 |
| 20 | bool "stm32f7 family" |
| Patrice Chotard | 1226eaf | 2018-01-12 09:23:50 +0100 | [diff] [blame] | 21 | select CLK |
| 22 | select DM_GPIO |
| 23 | select DM_RESET |
| 24 | select MISC |
| 25 | select PINCTRL |
| 26 | select PINCTRL_STM32 |
| 27 | select RAM |
| Michal Simek | 7e7ba3b | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 28 | select STM32_RCC |
| 29 | select STM32_RESET |
| 30 | select STM32_SDRAM |
| 31 | select STM32_SERIAL |
| 32 | select STM32_TIMER |
| 33 | select SUPPORT_SPL |
| 34 | select TIMER |
| 35 | imply SPL_OS_BOOT |
| Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 36 | |
| Patrice Chotard | 1e1d02d | 2017-09-13 18:00:12 +0200 | [diff] [blame] | 37 | config STM32H7 |
| 38 | bool "stm32h7 family" |
| 39 | select CLK |
| 40 | select DM_GPIO |
| 41 | select DM_RESET |
| 42 | select MISC |
| 43 | select PINCTRL |
| 44 | select PINCTRL_STM32 |
| 45 | select RAM |
| 46 | select REGMAP |
| Patrice Chotard | 1e1d02d | 2017-09-13 18:00:12 +0200 | [diff] [blame] | 47 | select STM32_RCC |
| 48 | select STM32_RESET |
| Michal Simek | 7e7ba3b | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 49 | select STM32_SDRAM |
| Patrice Chotard | 9e27650 | 2018-01-12 09:23:49 +0100 | [diff] [blame] | 50 | select STM32_SERIAL |
| Patrice Chotard | 0c15676 | 2018-02-07 10:44:50 +0100 | [diff] [blame] | 51 | select STM32_TIMER |
| Patrice Chotard | 1e1d02d | 2017-09-13 18:00:12 +0200 | [diff] [blame] | 52 | select SYSCON |
| Patrice Chotard | 0c15676 | 2018-02-07 10:44:50 +0100 | [diff] [blame] | 53 | select TIMER |
| Patrice Chotard | 1e1d02d | 2017-09-13 18:00:12 +0200 | [diff] [blame] | 54 | |
| Vikas Manocha | 95c8919 | 2016-01-15 17:49:06 -0800 | [diff] [blame] | 55 | source "arch/arm/mach-stm32/stm32f4/Kconfig" |
| Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 56 | source "arch/arm/mach-stm32/stm32f7/Kconfig" |
| Patrice Chotard | 1e1d02d | 2017-09-13 18:00:12 +0200 | [diff] [blame] | 57 | source "arch/arm/mach-stm32/stm32h7/Kconfig" |
| Vikas Manocha | 95c8919 | 2016-01-15 17:49:06 -0800 | [diff] [blame] | 58 | |
| 59 | endif |