blob: 15bee169a90cde9d14f7aa02ebd78678a5e42d98 [file] [log] [blame]
Michal Simek48a43022018-11-29 10:37:49 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * dts file for Xilinx ZynqMP Mini Configuration
4 *
5 * (C) Copyright 2017, Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@xilinx.com>
8 */
9
10/dts-v1/;
11
12/ {
13 model = "ZynqMP MINI";
14 compatible = "xlnx,zynqmp";
15 #address-cells = <2>;
16 #size-cells = <2>;
17
18 aliases {
19 serial0 = &dcc;
20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 memory@0 {
27 device_type = "memory";
28 reg = <0x0 0xfffc0000 0x0 0x40000>, <0x0 0x0 0x0 0x80000000>;
29 };
30
31 dcc: dcc {
32 compatible = "arm,dcc";
33 status = "disabled";
Simon Glassd3a98cb2023-02-13 08:56:33 -070034 bootph-all;
Michal Simek48a43022018-11-29 10:37:49 +010035 };
36};
37
38&dcc {
39 status = "okay";
40};