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Masami Hiramatsuea0ab682021-06-04 18:44:59 +09001// SPDX-License-Identifier: BSD-2-Clause-Patent
2//
3// Copyright (c) 2021, Linaro Limited. All rights reserved.
4//
5
6/ {
7 aliases {
8 spi_nor = &spi_nor;
9 i2c0 = &i2c0;
10 };
11
12 spi_nor: spi@54800000 {
13 compatible = "socionext,synquacer-spi";
14 reg = <0x00 0x54800000 0x00 0x1000>;
15 interrupts = <0x00 0x9c 0x04 0x00 0x9d 0x04 0x00 0x9e 0x04>;
16 clocks = <&clk_alw_1_8>;
17 clock-names = "iHCLK";
18 socionext,use-rtm;
19 socionext,set-aces;
20 #address-cells = <1>;
21 #size-cells = <0>;
22 status = "okay";
Masami Hiramatsuea0ab682021-06-04 18:44:59 +090023
Rob Herringa7086ca2022-12-06 10:16:30 -060024 flash@0 {
Masami Hiramatsuea0ab682021-06-04 18:44:59 +090025 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
28 reg = <0>; /* Chip select 0 */
29 spi-max-frequency = <31250000>;
30 spi-rx-bus-width = <0x1>;
31 spi-tx-bus-width = <0x1>;
Masami Hiramatsuf0538e22021-07-12 19:36:03 +090032
33 partitions {
34 compatible = "fixed-partitions";
35 #address-cells = <1>;
36 #size-cells = <1>;
37
38 partition@0 {
39 label = "BootStrap-BL1";
40 reg = <0x0 0x70000>;
41 read-only;
42 };
43
44 partition@70000 {
45 label = "Flash-Writer";
46 reg = <0x70000 0x90000>;
47 read-only;
48 };
49
50 partition@100000 {
51 label = "SCP-BL2";
52 reg = <0x100000 0x80000>;
53 read-only;
54 };
55
56 partition@180000 {
57 label = "FIP-TFA";
58 reg = <0x180000 0x78000>;
59 };
60
61 partition@1f8000 {
62 label = "Stage2Tables";
63 reg = <0x1f8000 0x8000>;
64 };
65
66 partition@200000 {
67 label = "U-Boot";
68 reg = <0x200000 0x100000>;
69 };
70
71 partition@300000 {
72 label = "UBoot-Env";
73 reg = <0x300000 0x100000>;
74 };
75
76 partition@500000 {
77 label = "Ex-OPTEE";
78 reg = <0x500000 0x200000>;
79 };
80 };
Masami Hiramatsuea0ab682021-06-04 18:44:59 +090081 };
82 };
83
84 i2c0: i2c@51200000 {
85 compatible = "socionext,synquacer-i2c";
86 reg = <0x0 0x51200000 0x0 0x1000>;
87 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
88 clocks = <&clk_i2c>;
89 clock-names = "pclk";
90 clock-frequency = <400000>;
91 #address-cells = <1>;
92 #size-cells = <0>;
93 status = "okay";
94
95 pcf8563: rtc@51 {
96 compatible = "nxp,pcf8563";
97 reg = <0x51>;
98 };
99 };
100
101 firmware {
102 optee {
103 status = "okay";
104 };
105 };
106};
107
108&smmu {
109 status = "okay";
110};
111
112&pcie0 {
113 status = "okay";
114};
115
116&pcie1 {
117 status = "okay";
118};
119
120&sdhci {
121 status = "okay";
122};