blob: ea7a5a17ae0f2b11ace6682c9476cb18e9721e10 [file] [log] [blame]
Peter Robinson6a349e72020-04-20 20:27:36 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Peter Robinson <pbrobinson at gmail.com>
4 */
5
6#include "rk3399-u-boot.dtsi"
7#include "rk3399-sdram-lpddr4-100.dtsi"
8
9/ {
Peter Robinson6a349e72020-04-20 20:27:36 +010010 chosen {
Peter Robinsoncee3edd2020-06-08 23:50:30 +010011 u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc;
12 };
13
14 config {
15 u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
Peter Robinson6a349e72020-04-20 20:27:36 +010016 };
17};
18
Arnaud Patard (Rtp)c3b469a2021-03-05 11:27:50 +010019&edp {
20 rockchip,panel = <&edp_panel>;
21};
22
Peter Robinson6a349e72020-04-20 20:27:36 +010023&sdhci {
24 max-frequency = <25000000>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070025 bootph-all;
Peter Robinson6a349e72020-04-20 20:27:36 +010026};
27
28&sdmmc {
29 max-frequency = <20000000>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070030 bootph-all;
Peter Robinson6a349e72020-04-20 20:27:36 +010031};
32
33&spiflash {
Simon Glassd3a98cb2023-02-13 08:56:33 -070034 bootph-all;
Peter Robinson6a349e72020-04-20 20:27:36 +010035};
36
37&vdd_log {
38 regulator-init-microvolt = <950000>;
39};