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git01.mediatek.com / filogic / uboot / a5b4bdbda8ccd90e08ff2f5b643b50a27d45178e / . / arch / arm / dts / nuvoton-npcm845-evb.dts
blob: 3cab7807e316349adc672759ae243039e127a523 [file] [log] [blame]
Jim Liu147c0002022-09-27 16:45:15 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2// Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com
3
4/dts-v1/;
5#include "nuvoton-npcm845.dtsi"
Jim Liu89b26542022-11-28 10:32:44 +0800[diff] [blame]6#include "nuvoton-npcm845-pincfg.dtsi"
Jim Liu147c0002022-09-27 16:45:15 +0800[diff] [blame]7
8/ {
9 model = "Nuvoton npcm845 Development Board (Device Tree)";
10 compatible = "nuvoton,npcm845-evb", "nuvoton,npcm845";
11
12 aliases {
13 serial0 = &serial0;
Jim Liu2e4fb4e2023-01-17 16:59:21 +0800[diff] [blame]14 ethernet0 = &gmac0;
15 ethernet1 = &gmac1;
16 ethernet2 = &gmac2;
17 ethernet3 = &gmac3;
Jim Liu89b26542022-11-28 10:32:44 +0800[diff] [blame]18 i2c0 = &i2c0;
Jim Liu2e4fb4e2023-01-17 16:59:21 +0800[diff] [blame]19 i2c1 = &i2c1;
20 i2c2 = &i2c2;
21 i2c3 = &i2c3;
22 i2c4 = &i2c4;
23 i2c5 = &i2c5;
24 i2c6 = &i2c6;
25 i2c7 = &i2c7;
26 i2c8 = &i2c8;
27 i2c9 = &i2c9;
28 i2c10 = &i2c10;
29 i2c11 = &i2c11;
30 i2c12 = &i2c12;
31 i2c13 = &i2c13;
32 i2c14 = &i2c14;
33 i2c15 = &i2c15;
34 i2c16 = &i2c16;
35 i2c17 = &i2c17;
36 i2c18 = &i2c18;
37 i2c19 = &i2c19;
38 i2c20 = &i2c20;
39 i2c21 = &i2c21;
40 i2c22 = &i2c22;
41 i2c23 = &i2c23;
42 i2c24 = &i2c24;
43 i2c25 = &i2c25;
44 i2c26 = &i2c26;
Jim Liu89b26542022-11-28 10:32:44 +0800[diff] [blame]45 spi0 = &fiu0;
46 spi1 = &fiu1;
47 spi3 = &fiu3;
48 spi4 = &fiux;
49 spi5 = &spi1;
50 usb0 = &udc0;
51 usb1 = &ehci1;
52 usb2 = &ehci2;
Jim Liu147c0002022-09-27 16:45:15 +0800[diff] [blame]53 };
54
55 chosen {
56 stdout-path = &serial0;
57 };
58
59 memory {
60 reg = <0x0 0x0 0x0 0x40000000>;
61 };
Jim Liu89b26542022-11-28 10:32:44 +0800[diff] [blame]62
63 vsbr2: vsbr2 {
64 compatible = "regulator-npcm845";
65 regulator-name = "vr2";
66 regulator-min-microvolt = <1800000>;
67 regulator-max-microvolt = <3300000>;
68 regulator-always-on;
69 };
70
71 vsbv8: vsbv8 {
72 compatible = "regulator-npcm845";
73 regulator-name = "v8";
74 regulator-min-microvolt = <1800000>;
75 regulator-max-microvolt = <3300000>;
76 regulator-always-on;
77 };
78
79 vsbv5: vsbv5 {
80 compatible = "regulator-npcm845";
81 regulator-name = "v5";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <3300000>;
84 regulator-always-on;
85 };
86
Jim Liu147c0002022-09-27 16:45:15 +0800[diff] [blame]87};
88
89&serial0 {
90 status = "okay";
91};
92
93&watchdog1 {
94 status = "okay";
95};
Jim Liu89b26542022-11-28 10:32:44 +0800[diff] [blame]96
97&fiu0 {
98 status = "okay";
99 pinctrl-names = "default";
100 pinctrl-0 = <&spi0cs1_pins>;
101 spi-nor@0 {
102 compatible = "jedec,spi-nor";
103 reg = <0>;
104 spi-max-frequency = <25000000>;
105 };
106 spi_flash@1 {
107 compatible = "jedec,spi-nor";
108 reg = <1>;
109 spi-max-frequency = <25000000>;
110 };
111};
112
113&fiu1 {
114 status = "okay";
115 spi-nor@0 {
116 compatible = "jedec,spi-nor";
117 reg = <0>;
118 spi-max-frequency = <25000000>;
119 };
120};
121
122&fiu3 {
123 pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>;
124 status = "okay";
125 vqspi-supply = <&vsbv5>;
126 vqspi-microvolt = <3300000>;
127 spi-nor@0 {
128 compatible = "jedec,spi-nor";
129 reg = <0>;
130 spi-max-frequency = <25000000>;
131 };
132};
133
134&fiux {
135 nuvoton,spix-mode;
136 status = "okay";
137};
138
Jim Liu2e4fb4e2023-01-17 16:59:21 +0800[diff] [blame]139&gmac0 {
140 phy-mode = "sgmii";
141 snps,reset-active-low;
142 snps,reset-delays-us = <0 10000 1000000>;
143 snps,reset-gpio = <&gpio5 30 GPIO_ACTIVE_LOW>; /* gpio190 */
144 status = "okay";
145};
146
147&gmac1 {
148 phy-mode = "rgmii-id";
149 snps,reset-active-low;
150 snps,reset-delays-us = <0 10000 1000000>;
151 snps,reset-gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; /* gpio162 */
152 status = "okay";
153};
154
155&gmac2 {
156 phy-mode = "NC-SI";
157 max-speed = <100>;
158 use-ncsi;
159 pinctrl-0 = <&r1_pins
160 &r1en_pins
161 &r1oen_pins>;
162 status = "disabled";
163};
164
165&gmac3 {
166 phy-mode = "rmii";
167 pinctrl-names = "default";
168 pinctrl-0 = <&r2_pins
169 &r2oen_pins
170 &r2en_pins
171 &gpio91o_pins
172 &gpio92o_pins>;
173 snps,bitbang-mii;
174 snps,mdc-gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio91 */
175 snps,mdio-gpio = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* gpio92 */
176 snps,reset-active-low;
177 snps,reset-delays-us = <0 10000 1000000>;
178 snps,reset-gpio = <&gpio2 29 GPIO_ACTIVE_LOW>; /* gpio93 */
179 status = "okay";
180};
181
Jim Liu89b26542022-11-28 10:32:44 +0800[diff] [blame]182&spi1 {
183 status = "okay";
184};
185
186&usbphy1 {
187 status = "okay";
188};
189
190&usbphy2 {
191 status = "okay";
192};
193
194&usbphy3 {
195 status = "okay";
196};
197
198&udc0 {
199 status = "okay";
200 phys = <&usbphy1 0>;
201};
202
203&sdhci0 {
204 bus-width = <0x8>;
205 status = "okay";
206};
207
208&ehci1 {
209 status = "okay";
210 phys = <&usbphy2 3>;
211};
212
213&ehci2 {
214 status = "okay";
215 phys = <&usbphy3 4>;
216};
217
Jim Liu2e4fb4e2023-01-17 16:59:21 +0800[diff] [blame]218&rng {
219 status = "okay";
220};
221
222&aes {
223 status = "okay";
224};
225
226&sha {
227 status = "okay";
228};
229
230&otp {
231 status = "okay";
232};
233
Jim Liu89b26542022-11-28 10:32:44 +0800[diff] [blame]234&i2c0 {
235 status = "okay";
236};
237
Jim Liu2e4fb4e2023-01-17 16:59:21 +0800[diff] [blame]238&i2c1 {
239 status = "okay";
240};
241
242&i2c2 {
243 status = "okay";
244};
245
246&i2c3 {
247 status = "okay";
248};
249
250&i2c4 {
251 status = "okay";
252};
253
254&i2c5 {
255 status = "okay";
256};
257
258&i2c6 {
259 status = "okay";
260 tmp100@48 {
261 compatible = "tmp100";
262 reg = <0x48>;
263 status = "okay";
264 };
265};
266
267&i2c7 {
268 status = "okay";
269};
270
271&i2c8 {
272 status = "okay";
273};
274
275&i2c9 {
276 status = "okay";
277};
278
279&i2c10 {
280 status = "okay";
281};
282
283&i2c11 {
284 status = "okay";
285};
286
287&i2c12 {
288 status = "okay";
289};
290
291&i2c13 {
292 status = "okay";
293};
294
295&i2c14 {
296 status = "okay";
297};
298
299&i2c15 {
300 status = "okay";
301};
302
303&i2c16 {
304 status = "okay";
305};
306
307&i2c17 {
308 status = "okay";
309};
310
311&i2c18 {
312 status = "okay";
313};
314
315&i2c19 {
316 status = "okay";
317};
318
319&i2c20 {
320 status = "okay";
321};
322
323&i2c21 {
324 status = "okay";
325};
326
327&i2c22 {
328 status = "okay";
329};
330
331&i2c23 {
332 status = "okay";
333};
334
335&i2c24 {
336 status = "okay";
337};
338
339&i2c25 {
340 status = "okay";
341};
342
343&i2c26 {
344 status = "okay";
345};
346
Jim Liu89b26542022-11-28 10:32:44 +0800[diff] [blame]347&pinctrl {
348 pinctrl-names = "default";
349 pinctrl-0 = <
350 &gspi_pins
351 &vgadig_pins
352 &spix_pins
353 &r1_pins
354 &r1en_pins
355 &r1oen_pins
356 >;
357};