Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | ||||
3 | * Copyright 2019 NXP | ||||
4 | */ | ||||
5 | |||||
6 | #include "imx8mp-u-boot.dtsi" | ||||
7 | |||||
8 | / { | ||||
9 | model = "MSC SM2S-IMX8MPLUS"; | ||||
10 | compatible = "avnet,sm2s-imx8mp", "fsl,imx8mp"; | ||||
11 | |||||
12 | wdt-reboot { | ||||
13 | compatible = "wdt-reboot"; | ||||
14 | wdt = <&wdog1>; | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 15 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 16 | }; |
17 | }; | ||||
18 | |||||
19 | ®_usdhc2_vmmc { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 20 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 21 | }; |
22 | |||||
23 | &gpio1 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 24 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 25 | }; |
26 | |||||
27 | &gpio2 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 28 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 29 | }; |
30 | |||||
31 | &gpio3 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 32 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 33 | }; |
34 | |||||
35 | &i2c1 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 36 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 37 | }; |
38 | |||||
39 | &i2c2 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 40 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 41 | }; |
42 | |||||
43 | &i2c3 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 44 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 45 | }; |
46 | |||||
47 | &i2c4 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 48 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 49 | }; |
50 | |||||
51 | &i2c5 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 52 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 53 | }; |
54 | |||||
55 | &i2c6 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 56 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 57 | }; |
58 | |||||
59 | &pinctrl_i2c6 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 60 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 61 | }; |
62 | |||||
63 | &pmic { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 64 | bootph-pre-ram; |
Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 65 | }; |