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wdenkfe8c2802002-11-03 00:38:21 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
6 * Add support for Am29F016D and dynamic switch setting.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27/*
28 * Modified 4/5/2001
29 * Wait for completion of each sector erase command issued
30 * 4/5/2001
31 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
32 */
33
34#include <common.h>
35#include <ppc4xx.h>
36#include <asm/processor.h>
37
38
39#undef DEBUG
40#ifdef DEBUG
41#define DEBUGF(x...) printf(x)
42#else
43#define DEBUGF(x...)
44#endif /* DEBUG */
45
46#define BOOT_SMALL_FLASH 32 /* 00100000 */
47#define FLASH_ONBD_N 2 /* 00000010 */
48#define FLASH_SRAM_SEL 1 /* 00000001 */
49
50#define BOOT_SMALL_FLASH_VAL 4
51#define FLASH_ONBD_N_VAL 2
52#define FLASH_SRAM_SEL_VAL 1
53
54
55flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
56
57static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = {
wdenk57b2d802003-06-27 21:31:46 +000058 {0xffc00000, 0xffe00000, 0xff880000}, /* 0:000: configuraton 3 */
59 {0xffc00000, 0xffe00000, 0xff800000}, /* 1:001: configuraton 4 */
60 {0xffc00000, 0xffe00000, 0x00000000}, /* 2:010: configuraton 7 */
61 {0xffc00000, 0xffe00000, 0x00000000}, /* 3:011: configuraton 8 */
62 {0xff800000, 0xffa00000, 0xfff80000}, /* 4:100: configuraton 1 */
63 {0xff800000, 0xffa00000, 0xfff00000}, /* 5:101: configuraton 2 */
64 {0xffc00000, 0xffe00000, 0x00000000}, /* 6:110: configuraton 5 */
65 {0xffc00000, 0xffe00000, 0x00000000} /* 7:111: configuraton 6 */
wdenkfe8c2802002-11-03 00:38:21 +000066};
67
68/*-----------------------------------------------------------------------
69 * Functions
70 */
71static ulong flash_get_size (vu_long *addr, flash_info_t *info);
72static int write_word (flash_info_t *info, ulong dest, ulong data);
73#if 0
74static void flash_get_offsets (ulong base, flash_info_t *info);
75#endif
76
77#ifdef CONFIG_ADCIOP
78#define ADDR0 0x0aa9
79#define ADDR1 0x0556
80#define FLASH_WORD_SIZE unsigned char
81#endif
82
83#ifdef CONFIG_CPCI405
84#define ADDR0 0x5555
85#define ADDR1 0x2aaa
86#define FLASH_WORD_SIZE unsigned short
87#endif
88
89#ifdef CONFIG_WALNUT405
90#define ADDR0 0x5555
91#define ADDR1 0x2aaa
92#define FLASH_WORD_SIZE unsigned char
93#endif
94
95#ifdef CONFIG_EBONY
96#define ADDR0 0x5555
97#define ADDR1 0x2aaa
98#define FLASH_WORD_SIZE unsigned char
99#endif
100
101/*-----------------------------------------------------------------------
102 */
103
104unsigned long flash_init (void) {
105 unsigned long total_b = 0;
106 unsigned long size_b[CFG_MAX_FLASH_BANKS];
107 unsigned char * fpga_base = (unsigned char *)CFG_FPGA_BASE;
108 unsigned char switch_status;
109 unsigned short index = 0;
110 int i;
111
112
113 /* read FPGA base register FPGA_REG0 */
114 switch_status = *fpga_base;
115
116 /* check the bitmap of switch status */
117 if (switch_status & BOOT_SMALL_FLASH) {
118 index += BOOT_SMALL_FLASH_VAL;
119 }
120 if (switch_status & FLASH_ONBD_N) {
121 index += FLASH_ONBD_N_VAL;
122 }
123 if (switch_status & FLASH_SRAM_SEL) {
124 index += FLASH_SRAM_SEL_VAL;
125 }
126
127 DEBUGF("\n");
128 DEBUGF("FLASH: Index: %d\n", index);
129
130 /* Init: no FLASHes known */
131 for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
132 flash_info[i].flash_id = FLASH_UNKNOWN;
133 flash_info[i].sector_count = -1;
134 flash_info[i].size = 0;
135
136 /* check whether the address is 0 */
137 if (flash_addr_table[index][i] == 0) {
138 continue;
139 }
140
141 /* call flash_get_size() to initialize sector address */
142 size_b[i] = flash_get_size(
143 (vu_long *)flash_addr_table[index][i], &flash_info[i]);
144 flash_info[i].size = size_b[i];
145 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
146 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
147 i, size_b[i], size_b[i]<<20);
148 flash_info[i].sector_count = -1;
149 flash_info[i].size = 0;
150 }
151
152 total_b += flash_info[i].size;
153 }
154
155 return total_b;
156}
157
158
wdenkfe8c2802002-11-03 00:38:21 +0000159/*-----------------------------------------------------------------------
160 */
161#if 0
162static void flash_get_offsets (ulong base, flash_info_t *info)
163{
164 int i;
165
166 /* set up sector start address table */
167 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
168 (info->flash_id == FLASH_AM040) ||
169 (info->flash_id == FLASH_AMD016)) {
170 for (i = 0; i < info->sector_count; i++)
171 info->start[i] = base + (i * 0x00010000);
172 } else {
173 if (info->flash_id & FLASH_BTYPE) {
174 /* set sector offsets for bottom boot block type */
175 info->start[0] = base + 0x00000000;
176 info->start[1] = base + 0x00004000;
177 info->start[2] = base + 0x00006000;
178 info->start[3] = base + 0x00008000;
179 for (i = 4; i < info->sector_count; i++) {
180 info->start[i] = base + (i * 0x00010000) - 0x00030000;
181 }
182 } else {
183 /* set sector offsets for top boot block type */
184 i = info->sector_count - 1;
185 info->start[i--] = base + info->size - 0x00004000;
186 info->start[i--] = base + info->size - 0x00006000;
187 info->start[i--] = base + info->size - 0x00008000;
188 for (; i >= 0; i--) {
189 info->start[i] = base + i * 0x00010000;
190 }
191 }
192 }
193}
194#endif /* 0 */
195
196/*-----------------------------------------------------------------------
197 */
198void flash_print_info (flash_info_t *info)
199{
200 int i;
wdenk57b2d802003-06-27 21:31:46 +0000201 int k;
202 int size;
203 int erased;
204 volatile unsigned long *flash;
wdenkfe8c2802002-11-03 00:38:21 +0000205
206 if (info->flash_id == FLASH_UNKNOWN) {
207 printf ("missing or unknown FLASH type\n");
208 return;
209 }
210
211 switch (info->flash_id & FLASH_VENDMASK) {
212 case FLASH_MAN_AMD: printf ("AMD "); break;
213 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
214 case FLASH_MAN_SST: printf ("SST "); break;
215 default: printf ("Unknown Vendor "); break;
216 }
217
218 switch (info->flash_id & FLASH_TYPEMASK) {
219 case FLASH_AMD016: printf ("AM29F016D (16 Mbit, uniform sector size)\n");
220 break;
221 case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
222 break;
223 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
224 break;
225 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
226 break;
227 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
228 break;
229 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
230 break;
231 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
232 break;
233 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
234 break;
235 case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
236 break;
237 case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
238 break;
239 case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
240 break;
241 case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
242 break;
243 default: printf ("Unknown Chip Type\n");
244 break;
245 }
246
247 printf (" Size: %ld KB in %d Sectors\n",
248 info->size >> 10, info->sector_count);
249
250 printf (" Sector Start Addresses:");
251 for (i=0; i<info->sector_count; ++i) {
wdenk57b2d802003-06-27 21:31:46 +0000252 /*
253 * Check if whole sector is erased
254 */
255 if (i != (info->sector_count-1))
wdenkfe8c2802002-11-03 00:38:21 +0000256 size = info->start[i+1] - info->start[i];
wdenk57b2d802003-06-27 21:31:46 +0000257 else
wdenkfe8c2802002-11-03 00:38:21 +0000258 size = info->start[0] + info->size - info->start[i];
wdenk57b2d802003-06-27 21:31:46 +0000259 erased = 1;
260 flash = (volatile unsigned long *)info->start[i];
261 size = size >> 2; /* divide by 4 for longword access */
262 for (k=0; k<size; k++)
wdenkfe8c2802002-11-03 00:38:21 +0000263 {
264 if (*flash++ != 0xffffffff)
265 {
266 erased = 0;
267 break;
268 }
269 }
270
271 if ((i % 5) == 0)
272 printf ("\n ");
273 printf (" %08lX%s%s",
274 info->start[i],
275 erased ? " E" : " ",
276 info->protect[i] ? "RO " : " "
277 );
278 }
279 printf ("\n");
280 return;
281 }
282
283/*-----------------------------------------------------------------------
284 */
285
286
287/*-----------------------------------------------------------------------
288 */
289
290/*
291 * The following code cannot be run from FLASH!
292 */
293 static ulong flash_get_size (vu_long *addr, flash_info_t *info)
294 {
295 short i;
296 FLASH_WORD_SIZE value;
297 ulong base = (ulong)addr;
298 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
299
wdenk57b2d802003-06-27 21:31:46 +0000300 DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr );
wdenkfe8c2802002-11-03 00:38:21 +0000301
302 /* Write auto select command: read Manufacturer ID */
wdenk57b2d802003-06-27 21:31:46 +0000303 udelay(10000);
wdenkfe8c2802002-11-03 00:38:21 +0000304 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
wdenk57b2d802003-06-27 21:31:46 +0000305 udelay(1000);
wdenkfe8c2802002-11-03 00:38:21 +0000306 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
wdenk57b2d802003-06-27 21:31:46 +0000307 udelay(1000);
wdenkfe8c2802002-11-03 00:38:21 +0000308 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
wdenk57b2d802003-06-27 21:31:46 +0000309 udelay(1000);
wdenkfe8c2802002-11-03 00:38:21 +0000310
311#ifdef CONFIG_ADCIOP
312 value = addr2[2];
313#else
314 value = addr2[0];
315#endif
316
317 DEBUGF("FLASH MANUFACT: %x\n", value);
318
319 switch (value) {
320 case (FLASH_WORD_SIZE)AMD_MANUFACT:
321 info->flash_id = FLASH_MAN_AMD;
322 break;
323 case (FLASH_WORD_SIZE)FUJ_MANUFACT:
324 info->flash_id = FLASH_MAN_FUJ;
325 break;
326 case (FLASH_WORD_SIZE)SST_MANUFACT:
327 info->flash_id = FLASH_MAN_SST;
328 break;
wdenkc8434db2003-03-26 06:55:25 +0000329 case (FLASH_WORD_SIZE)STM_MANUFACT:
330 info->flash_id = FLASH_MAN_STM;
331 break;
wdenkfe8c2802002-11-03 00:38:21 +0000332 default:
333 info->flash_id = FLASH_UNKNOWN;
334 info->sector_count = 0;
335 info->size = 0;
336 return (0); /* no or unknown flash */
337 }
338
339#ifdef CONFIG_ADCIOP
340 value = addr2[0]; /* device ID */
341 debug ("\ndev_code=%x\n", value);
342#else
343 value = addr2[1]; /* device ID */
344#endif
345
346 DEBUGF("\nFLASH DEVICEID: %x\n", value);
347
348 switch (value) {
349 case (FLASH_WORD_SIZE)AMD_ID_F016D:
350 info->flash_id += FLASH_AMD016;
351 info->sector_count = 32;
352 info->size = 0x00200000;
353 break; /* => 2 MB */
wdenk57b2d802003-06-27 21:31:46 +0000354 case (FLASH_WORD_SIZE)STM_ID_F040B:
355 info->flash_id += FLASH_AM040;
356 info->sector_count = 8;
357 info->size = 0x0080000; /* => 512 ko */
358 break;
wdenkfe8c2802002-11-03 00:38:21 +0000359 case (FLASH_WORD_SIZE)AMD_ID_F040B:
360 info->flash_id += FLASH_AM040;
361 info->sector_count = 8;
362 info->size = 0x0080000; /* => 512 ko */
363 break;
364 case (FLASH_WORD_SIZE)AMD_ID_LV400T:
365 info->flash_id += FLASH_AM400T;
366 info->sector_count = 11;
367 info->size = 0x00080000;
368 break; /* => 0.5 MB */
369
370 case (FLASH_WORD_SIZE)AMD_ID_LV400B:
371 info->flash_id += FLASH_AM400B;
372 info->sector_count = 11;
373 info->size = 0x00080000;
374 break; /* => 0.5 MB */
375
376 case (FLASH_WORD_SIZE)AMD_ID_LV800T:
377 info->flash_id += FLASH_AM800T;
378 info->sector_count = 19;
379 info->size = 0x00100000;
380 break; /* => 1 MB */
381
382 case (FLASH_WORD_SIZE)AMD_ID_LV800B:
383 info->flash_id += FLASH_AM800B;
384 info->sector_count = 19;
385 info->size = 0x00100000;
386 break; /* => 1 MB */
387
388 case (FLASH_WORD_SIZE)AMD_ID_LV160T:
389 info->flash_id += FLASH_AM160T;
390 info->sector_count = 35;
391 info->size = 0x00200000;
392 break; /* => 2 MB */
393
394 case (FLASH_WORD_SIZE)AMD_ID_LV160B:
395 info->flash_id += FLASH_AM160B;
396 info->sector_count = 35;
397 info->size = 0x00200000;
398 break; /* => 2 MB */
399#if 0 /* enable when device IDs are available */
400 case (FLASH_WORD_SIZE)AMD_ID_LV320T:
401 info->flash_id += FLASH_AM320T;
402 info->sector_count = 67;
403 info->size = 0x00400000;
404 break; /* => 4 MB */
405
406 case (FLASH_WORD_SIZE)AMD_ID_LV320B:
407 info->flash_id += FLASH_AM320B;
408 info->sector_count = 67;
409 info->size = 0x00400000;
410 break; /* => 4 MB */
411#endif
412 case (FLASH_WORD_SIZE)SST_ID_xF800A:
413 info->flash_id += FLASH_SST800A;
414 info->sector_count = 16;
415 info->size = 0x00100000;
416 break; /* => 1 MB */
417
418 case (FLASH_WORD_SIZE)SST_ID_xF160A:
419 info->flash_id += FLASH_SST160A;
420 info->sector_count = 32;
421 info->size = 0x00200000;
422 break; /* => 2 MB */
423
424 default:
425 info->flash_id = FLASH_UNKNOWN;
426 return (0); /* => no or unknown flash */
427
428 }
429
430 /* set up sector start address table */
431 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
432 (info->flash_id == FLASH_AM040) ||
433 (info->flash_id == FLASH_AMD016)) {
434 for (i = 0; i < info->sector_count; i++)
435 info->start[i] = base + (i * 0x00010000);
436 } else {
437 if (info->flash_id & FLASH_BTYPE) {
438 /* set sector offsets for bottom boot block type */
439 info->start[0] = base + 0x00000000;
440 info->start[1] = base + 0x00004000;
441 info->start[2] = base + 0x00006000;
442 info->start[3] = base + 0x00008000;
443 for (i = 4; i < info->sector_count; i++) {
444 info->start[i] = base + (i * 0x00010000) - 0x00030000;
445 }
446 } else {
447 /* set sector offsets for top boot block type */
448 i = info->sector_count - 1;
449 info->start[i--] = base + info->size - 0x00004000;
450 info->start[i--] = base + info->size - 0x00006000;
451 info->start[i--] = base + info->size - 0x00008000;
452 for (; i >= 0; i--) {
453 info->start[i] = base + i * 0x00010000;
454 }
455 }
456 }
457
458 /* check for protected sectors */
459 for (i = 0; i < info->sector_count; i++) {
460 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
461 /* D0 = 1 if protected */
462#ifdef CONFIG_ADCIOP
463 addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
464 info->protect[i] = addr2[4] & 1;
465#else
466 addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
467 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
468 info->protect[i] = 0;
469 else
470 info->protect[i] = addr2[2] & 1;
471#endif
472 }
473
474 /*
475 * Prevent writes to uninitialized FLASH.
476 */
477 if (info->flash_id != FLASH_UNKNOWN) {
478#if 0 /* test-only */
479#ifdef CONFIG_ADCIOP
480 addr2 = (volatile unsigned char *)info->start[0];
481 addr2[ADDR0] = 0xAA;
482 addr2[ADDR1] = 0x55;
483 addr2[ADDR0] = 0xF0; /* reset bank */
484#else
485 addr2 = (FLASH_WORD_SIZE *)info->start[0];
486 *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
487#endif
488#else /* test-only */
489 addr2 = (FLASH_WORD_SIZE *)info->start[0];
490 *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
491#endif /* test-only */
492 }
493
494 return (info->size);
495 }
496
497 int wait_for_DQ7(flash_info_t *info, int sect)
498 {
499 ulong start, now, last;
500 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
501
502 start = get_timer (0);
503 last = start;
504 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
505 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
506 printf ("Timeout\n");
507 return -1;
508 }
509 /* show that we're waiting */
510 if ((now - last) > 1000) { /* every second */
511 putc ('.');
512 last = now;
513 }
514 }
515 return 0;
516 }
517
518/*-----------------------------------------------------------------------
519 */
520
521 int flash_erase (flash_info_t *info, int s_first, int s_last)
522 {
523 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
524 volatile FLASH_WORD_SIZE *addr2;
525 int flag, prot, sect, l_sect;
526 int i;
527
528 if ((s_first < 0) || (s_first > s_last)) {
529 if (info->flash_id == FLASH_UNKNOWN) {
530 printf ("- missing\n");
531 } else {
532 printf ("- no sectors to erase\n");
533 }
534 return 1;
535 }
536
537 if (info->flash_id == FLASH_UNKNOWN) {
538 printf ("Can't erase unknown flash type - aborted\n");
539 return 1;
540 }
541
542 prot = 0;
543 for (sect=s_first; sect<=s_last; ++sect) {
544 if (info->protect[sect]) {
545 prot++;
546 }
547 }
548
549 if (prot) {
550 printf ("- Warning: %d protected sectors will not be erased!\n",
551 prot);
552 } else {
553 printf ("\n");
554 }
555
556 l_sect = -1;
557
558 /* Disable interrupts which might cause a timeout here */
559 flag = disable_interrupts();
560
561 /* Start erase on unprotected sectors */
562 for (sect = s_first; sect<=s_last; sect++) {
563 if (info->protect[sect] == 0) { /* not protected */
564 addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
565 printf("Erasing sector %p\n", addr2);
566
567 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
568 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
569 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
570 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
571 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
572 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
573 addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
574 for (i=0; i<50; i++)
575 udelay(1000); /* wait 1 ms */
576 } else {
577 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
578 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
579 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
580 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
581 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
582 addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
583 }
584 l_sect = sect;
585 /*
586 * Wait for each sector to complete, it's more
587 * reliable. According to AMD Spec, you must
588 * issue all erase commands within a specified
589 * timeout. This has been seen to fail, especially
590 * if printf()s are included (for debug)!!
591 */
592 wait_for_DQ7(info, sect);
593 }
594 }
595
596 /* re-enable interrupts if necessary */
597 if (flag)
598 enable_interrupts();
599
600 /* wait at least 80us - let's wait 1 ms */
601 udelay (1000);
602
603#if 0
604 /*
605 * We wait for the last triggered sector
606 */
607 if (l_sect < 0)
608 goto DONE;
609 wait_for_DQ7(info, l_sect);
610
611 DONE:
612#endif
613 /* reset to read mode */
614 addr = (FLASH_WORD_SIZE *)info->start[0];
615 addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
616
617 printf (" done\n");
618 return 0;
619 }
620
621/*-----------------------------------------------------------------------
622 * Copy memory to flash, returns:
623 * 0 - OK
624 * 1 - write timeout
625 * 2 - Flash not erased
626 */
627
628 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
629 {
630 ulong cp, wp, data;
631 int i, l, rc;
632
633 wp = (addr & ~3); /* get lower word aligned address */
634
635 /*
636 * handle unaligned start bytes
637 */
638 if ((l = addr - wp) != 0) {
639 data = 0;
640 for (i=0, cp=wp; i<l; ++i, ++cp) {
641 data = (data << 8) | (*(uchar *)cp);
642 }
643 for (; i<4 && cnt>0; ++i) {
644 data = (data << 8) | *src++;
645 --cnt;
646 ++cp;
647 }
648 for (; cnt==0 && i<4; ++i, ++cp) {
649 data = (data << 8) | (*(uchar *)cp);
650 }
651
652 if ((rc = write_word(info, wp, data)) != 0) {
653 return (rc);
654 }
655 wp += 4;
656 }
657
658 /*
659 * handle word aligned part
660 */
661 while (cnt >= 4) {
662 data = 0;
663 for (i=0; i<4; ++i) {
664 data = (data << 8) | *src++;
665 }
666 if ((rc = write_word(info, wp, data)) != 0) {
667 return (rc);
668 }
669 wp += 4;
670 cnt -= 4;
671 }
672
673 if (cnt == 0) {
674 return (0);
675 }
676
677 /*
678 * handle unaligned tail bytes
679 */
680 data = 0;
681 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
682 data = (data << 8) | *src++;
683 --cnt;
684 }
685 for (; i<4; ++i, ++cp) {
686 data = (data << 8) | (*(uchar *)cp);
687 }
688
689 return (write_word(info, wp, data));
690 }
691
692/*-----------------------------------------------------------------------
693 * Write a word to Flash, returns:
694 * 0 - OK
695 * 1 - write timeout
696 * 2 - Flash not erased
697 */
698 static int write_word (flash_info_t * info, ulong dest, ulong data)
699 {
700 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]);
701 volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
702 volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
703 ulong start;
704 int i;
705
706 /* Check if Flash is (sufficiently) erased */
707 if ((*((volatile FLASH_WORD_SIZE *) dest) &
708 (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
709 return (2);
710 }
711
712 for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
713 int flag;
714
715 /* Disable interrupts which might cause a timeout here */
716 flag = disable_interrupts ();
717
718 addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
719 addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
720 addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
721
722 dest2[i] = data2[i];
723
724 /* re-enable interrupts if necessary */
725 if (flag)
726 enable_interrupts ();
727
728 /* data polling for D7 */
729 start = get_timer (0);
730 while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
731 (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
732
733 if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
734 return (1);
735 }
736 }
737 }
738
739 return (0);
740 }
741
742/*-----------------------------------------------------------------------
743 */