| Mingkai Hu | a53b139 | 2009-09-23 15:20:39 +0800 | [diff] [blame^] | 1 | Overview: |
| 2 | ========= |
| 3 | |
| 4 | The MPC8536E integrates a PowerPC processor core with system logic |
| 5 | required for imaging, networking, and communications applications. |
| 6 | |
| 7 | Boot from NAND: |
| 8 | =============== |
| 9 | |
| 10 | The MPC8536E is capable of booting from NAND flash which uses the image |
| 11 | u-boot-nand.bin. This image contains two parts: a first stage image(also |
| 12 | call 4K NAND loader and a second stage image. The former is appended to |
| 13 | the latter to produce u-boot-nand.bin. |
| 14 | |
| 15 | The bootup process can be divided into two stages: the first stage will |
| 16 | configure the L2SRAM, then copy the second stage image to L2SRAM and jump |
| 17 | to it. The second stage image is to configure all the hardware and boot up |
| 18 | to U-Boot command line. |
| 19 | |
| 20 | The 4K NAND loader's code comes from the corresponding nand_spl directory, |
| 21 | along with the code twisted by CONFIG_NAND_SPL. The macro CONFIG_NAND_SPL |
| 22 | is mainly used to shrink the code size to the 4K size limitation. |
| 23 | |
| 24 | The macro CONFIG_SYS_RAMBOOT is used to control the code to produce the |
| 25 | second stage image. It's set in the board config file when boot from NAND |
| 26 | is selected. |
| 27 | |
| 28 | Build and boot steps |
| 29 | -------------------- |
| 30 | |
| 31 | 1. Building image |
| 32 | make MPC8536DS_NAND_config |
| 33 | make CROSS_COMPILE=powerpc-none-linux-gnuspe- all |
| 34 | |
| 35 | 2. Change dip-switch |
| 36 | SW2[5-8] = 1011 |
| 37 | SW9[1-3] = 101 |
| 38 | Note: 1 stands for 'on', 0 stands for 'off' |
| 39 | |
| 40 | 3. Flash image |
| 41 | tftp 1000000 u-boot-nand.bin |
| 42 | nand erase 0 a0000 |
| 43 | nand write 1000000 0 a0000 |
| 44 | |
| 45 | Boot from On-chip ROM: |
| 46 | ====================== |
| 47 | |
| 48 | The MPC8536E is capable of booting from the on-chip ROM - boot from eSDHC |
| 49 | and boot from eSPI. When power on, the porcessor excutes the ROM code to |
| 50 | initialize the eSPI/eSDHC controller, and loads the mian U-Boot image from |
| 51 | the memory device that interfaced to the controller, such as the SDCard or |
| 52 | SPI EEPROM, to the target memory, e.g. SDRAM or L2SRAM, then boot from it. |
| 53 | |
| 54 | The memory device should contain a specific data structure with control word |
| 55 | and config word at the fixed address. The config word direct the process how |
| 56 | to config the memory device, and the control word direct the processor where |
| 57 | to find the image on the memory device, or where copy the main image to. The |
| 58 | user can use any method to store the data structure to the memory device, only |
| 59 | if store it on the assigned address. |
| 60 | |
| 61 | Build and boot steps |
| 62 | -------------------- |
| 63 | |
| 64 | For boot from eSDHC: |
| 65 | 1. Build image |
| 66 | make MPC8536DS_SDCARD_config |
| 67 | make CROSS_COMPILE=powerpc-none-linux-gnuspe- all |
| 68 | |
| 69 | 2. Change dip-switch |
| 70 | SW2[5-8] = 0111 |
| 71 | SW3[1] = 0 |
| 72 | SW8[7] = 0 - The on-board SD/MMC slot is active |
| 73 | SW8[7] = 1 - The externel SD/MMC slot is active |
| 74 | |
| 75 | 3. Put image to SDCard |
| 76 | Put the follwing info at the assigned address on the SDCard: |
| 77 | |
| 78 | Offset | Data | Description |
| 79 | -------------------------------------------------------- |
| 80 | | 0x40-0x43 | 0x424F4F54 | BOOT signature | |
| 81 | -------------------------------------------------------- |
| 82 | | 0x48-0x4B | 0x00080000 | u-boot.bin's size | |
| 83 | -------------------------------------------------------- |
| 84 | | 0x50-0x53 | 0x???????? | u-boot.bin's Addr on SDCard | |
| 85 | -------------------------------------------------------- |
| 86 | | 0x58-0x5B | 0xF8F80000 | Target Address | |
| 87 | ------------------------------------------------------- |
| 88 | | 0x60-0x63 | 0xF8FFF000 | Execution Starting Address | |
| 89 | -------------------------------------------------------- |
| 90 | | 0x68-0x6B | 0x6 | Number of Config Addr/Data | |
| 91 | -------------------------------------------------------- |
| 92 | | 0x80-0x83 | 0xFF720100 | Config Addr 1 | |
| 93 | | 0x84-0x87 | 0xF8F80000 | Config Data 1 | |
| 94 | -------------------------------------------------------- |
| 95 | | 0x88-0x8b | 0xFF720e44 | Config Addr 2 | |
| 96 | | 0x8c-0x8f | 0x0000000C | Config Data 2 | |
| 97 | -------------------------------------------------------- |
| 98 | | 0x90-0x93 | 0xFF720000 | Config Addr 3 | |
| 99 | | 0x94-0x97 | 0x80010000 | Config Data 3 | |
| 100 | -------------------------------------------------------- |
| 101 | | 0x98-0x9b | 0xFF72e40e | Config Addr 4 | |
| 102 | | 0x9c-0x9f | 0x00000040 | Config Data 4 | |
| 103 | -------------------------------------------------------- |
| 104 | | 0xa0-0xa3 | 0x40000001 | Config Addr 5 | |
| 105 | | 0xa4-0xa7 | 0x00000100 | Config Data 5 | |
| 106 | -------------------------------------------------------- |
| 107 | | 0xa8-0xab | 0x80000001 | Config Addr 6 | |
| 108 | | 0xac-0xaf | 0x80000001 | Config Data 6 | |
| 109 | -------------------------------------------------------- |
| 110 | | ...... | |
| 111 | -------------------------------------------------------- |
| 112 | | 0x???????? | u-boot.bin | |
| 113 | -------------------------------------------------------- |
| 114 | |
| 115 | then insert the SDCard to the active slot to boot up. |
| 116 | |
| 117 | For boot from eSPI: |
| 118 | 1. Build image |
| 119 | make MPC8536DS_SPIFLASH_config |
| 120 | make CROSS_COMPILE=powerpc-none-linux-gnuspe- all |
| 121 | |
| 122 | 2. Change dip-switch |
| 123 | SW2[5-8] = 0110 |
| 124 | |
| 125 | 3. Put image to SPI flash |
| 126 | Put the info in the above table onto the SPI flash, then |
| 127 | boot up. |