blob: eac5b781e94cba1ad69275903554c7c723655e61 [file] [log] [blame]
Simon Glassf79d5382014-11-12 22:42:21 -07001/*
2 * Copyright (c) 2014 Google, Inc
3 * Copyright (C) 2000 Ronald G. Minnich
4 *
5 * Microcode update for Intel PIII and later CPUs
6 *
7 * SPDX-License-Identifier: GPL-2.0
8 */
9
10#include <common.h>
11#include <errno.h>
12#include <fdtdec.h>
13#include <libfdt.h>
14#include <asm/cpu.h>
Simon Glass2df61882016-03-11 22:06:54 -070015#include <asm/microcode.h>
Simon Glassf79d5382014-11-12 22:42:21 -070016#include <asm/msr.h>
Simon Glass9281eb52015-01-01 16:18:14 -070017#include <asm/msr-index.h>
Simon Glassf79d5382014-11-12 22:42:21 -070018#include <asm/processor.h>
Simon Glass2df61882016-03-11 22:06:54 -070019
20DECLARE_GLOBAL_DATA_PTR;
Simon Glassf79d5382014-11-12 22:42:21 -070021
22/**
23 * struct microcode_update - standard microcode header from Intel
24 *
25 * We read this information out of the device tree and use it to determine
26 * whether the update is applicable or not. We also use the same structure
27 * to read information from the CPU.
28 */
29struct microcode_update {
30 uint header_version;
31 uint update_revision;
32 uint date_code;
33 uint processor_signature;
34 uint checksum;
35 uint loader_revision;
36 uint processor_flags;
37 const void *data;
38 int size;
39};
40
41static int microcode_decode_node(const void *blob, int node,
42 struct microcode_update *update)
43{
44 update->data = fdt_getprop(blob, node, "data", &update->size);
45 if (!update->data)
Simon Glassbd241242016-07-25 18:58:58 -060046 return -ENOENT;
Simon Glass9281eb52015-01-01 16:18:14 -070047 update->data += UCODE_HEADER_LEN;
48 update->size -= UCODE_HEADER_LEN;
Simon Glassf79d5382014-11-12 22:42:21 -070049
50 update->header_version = fdtdec_get_int(blob, node,
51 "intel,header-version", 0);
52 update->update_revision = fdtdec_get_int(blob, node,
53 "intel,update-revision", 0);
54 update->date_code = fdtdec_get_int(blob, node,
55 "intel,date-code", 0);
56 update->processor_signature = fdtdec_get_int(blob, node,
Simon Glassc8a5c412014-12-15 22:02:41 -070057 "intel,processor-signature", 0);
Simon Glassf79d5382014-11-12 22:42:21 -070058 update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0);
59 update->loader_revision = fdtdec_get_int(blob, node,
Simon Glassc8a5c412014-12-15 22:02:41 -070060 "intel,loader-revision", 0);
Simon Glassf79d5382014-11-12 22:42:21 -070061 update->processor_flags = fdtdec_get_int(blob, node,
Simon Glassc8a5c412014-12-15 22:02:41 -070062 "intel,processor-flags", 0);
Simon Glassf79d5382014-11-12 22:42:21 -070063
64 return 0;
65}
66
Simon Glassc17d4502016-03-11 22:07:09 -070067int microcode_read_rev(void)
Simon Glassf79d5382014-11-12 22:42:21 -070068{
Simon Glassc17d4502016-03-11 22:07:09 -070069 /* Quark does not have microcode MSRs */
70#ifdef CONFIG_INTEL_QUARK
71 return 0;
72#else
Simon Glassf79d5382014-11-12 22:42:21 -070073 /*
74 * Some Intel CPUs can be very finicky about the CPUID sequence used.
75 * So this is implemented in assembly so that it works reliably.
76 */
77 uint32_t low, high;
78
79 asm volatile (
80 "xorl %%eax, %%eax\n"
81 "xorl %%edx, %%edx\n"
Simon Glass9281eb52015-01-01 16:18:14 -070082 "movl %2, %%ecx\n"
Simon Glassf79d5382014-11-12 22:42:21 -070083 "wrmsr\n"
84 "movl $0x01, %%eax\n"
85 "cpuid\n"
Simon Glass9281eb52015-01-01 16:18:14 -070086 "movl %2, %%ecx\n"
Simon Glassf79d5382014-11-12 22:42:21 -070087 "rdmsr\n"
88 : /* outputs */
89 "=a" (low), "=d" (high)
90 : /* inputs */
Simon Glass9281eb52015-01-01 16:18:14 -070091 "i" (MSR_IA32_UCODE_REV)
Simon Glassf79d5382014-11-12 22:42:21 -070092 : /* clobbers */
93 "ebx", "ecx"
94 );
95
96 return high;
Simon Glassc17d4502016-03-11 22:07:09 -070097#endif
Simon Glassf79d5382014-11-12 22:42:21 -070098}
99
100static void microcode_read_cpu(struct microcode_update *cpu)
101{
102 /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
103 unsigned int x86_model, x86_family;
104 struct cpuid_result result;
105 uint32_t low, high;
106
Simon Glass9281eb52015-01-01 16:18:14 -0700107 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
Simon Glassf79d5382014-11-12 22:42:21 -0700108 result = cpuid(1);
Simon Glass9281eb52015-01-01 16:18:14 -0700109 rdmsr(MSR_IA32_UCODE_REV, low, cpu->update_revision);
Simon Glassf79d5382014-11-12 22:42:21 -0700110 x86_model = (result.eax >> 4) & 0x0f;
111 x86_family = (result.eax >> 8) & 0x0f;
112 cpu->processor_signature = result.eax;
113
114 cpu->processor_flags = 0;
115 if ((x86_model >= 5) || (x86_family > 6)) {
116 rdmsr(0x17, low, high);
117 cpu->processor_flags = 1 << ((high >> 18) & 7);
118 }
119 debug("microcode: sig=%#x pf=%#x revision=%#x\n",
120 cpu->processor_signature, cpu->processor_flags,
121 cpu->update_revision);
122}
123
124/* Get a microcode update from the device tree and apply it */
125int microcode_update_intel(void)
126{
127 struct microcode_update cpu, update;
128 const void *blob = gd->fdt_blob;
Simon Glassc8a5c412014-12-15 22:02:41 -0700129 int skipped;
Simon Glassf79d5382014-11-12 22:42:21 -0700130 int count;
131 int node;
132 int ret;
Simon Glass9281eb52015-01-01 16:18:14 -0700133 int rev;
Simon Glassf79d5382014-11-12 22:42:21 -0700134
135 microcode_read_cpu(&cpu);
136 node = 0;
137 count = 0;
Simon Glassc8a5c412014-12-15 22:02:41 -0700138 skipped = 0;
Simon Glassf79d5382014-11-12 22:42:21 -0700139 do {
140 node = fdtdec_next_compatible(blob, node,
141 COMPAT_INTEL_MICROCODE);
142 if (node < 0) {
143 debug("%s: Found %d updates\n", __func__, count);
Simon Glassc8a5c412014-12-15 22:02:41 -0700144 return count ? 0 : skipped ? -EEXIST : -ENOENT;
Simon Glassf79d5382014-11-12 22:42:21 -0700145 }
146
147 ret = microcode_decode_node(blob, node, &update);
Simon Glassbd241242016-07-25 18:58:58 -0600148 if (ret == -ENOENT && ucode_base) {
149 /*
150 * The microcode has been removed from the device tree
151 * in the build system. In that case it will have
152 * already been updated in car_init().
153 */
154 debug("%s: Microcode data not available\n", __func__);
155 skipped++;
156 continue;
157 }
Simon Glassf79d5382014-11-12 22:42:21 -0700158 if (ret) {
159 debug("%s: Unable to decode update: %d\n", __func__,
160 ret);
161 return ret;
162 }
Simon Glassc8a5c412014-12-15 22:02:41 -0700163 if (!(update.processor_signature == cpu.processor_signature &&
164 (update.processor_flags & cpu.processor_flags))) {
165 debug("%s: Skipping non-matching update, sig=%x, pf=%x\n",
166 __func__, update.processor_signature,
167 update.processor_flags);
168 skipped++;
169 continue;
Simon Glassf79d5382014-11-12 22:42:21 -0700170 }
Simon Glass9281eb52015-01-01 16:18:14 -0700171 wrmsr(MSR_IA32_UCODE_WRITE, (ulong)update.data, 0);
172 rev = microcode_read_rev();
Simon Glassf79d5382014-11-12 22:42:21 -0700173 debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
Simon Glass9281eb52015-01-01 16:18:14 -0700174 rev, update.date_code & 0xffff,
Simon Glassf79d5382014-11-12 22:42:21 -0700175 (update.date_code >> 24) & 0xff,
176 (update.date_code >> 16) & 0xff);
Simon Glass9281eb52015-01-01 16:18:14 -0700177 if (update.update_revision != rev) {
178 printf("Microcode update failed\n");
179 return -EFAULT;
180 }
Simon Glassf79d5382014-11-12 22:42:21 -0700181 count++;
182 } while (1);
183}